Vijay Nagasamy

Specification, planning, and synthesis in a VHDL design environment

Silicon 1076, a very-high-speed integrated circuit hardware description language (VHDL) design environment developed for specifying, simulating, and synthesizing digital hardware, is described. The environment integrates software tools for architectural-level design space exploration and synthesis and RTL synthesis. Silicon 1076 supports a top-down design methodology, while making use of bottom-up design information such as area and delay of modules and interconnect and routing estimates. The flexible design environment allows the user to describe separate parts of the design at different abstraction levels and to perform mixed-level VHDL simulation and synthesis. With the synthesis tools, the user can perform high-level what-if analysis and planning by constraining and exploring portions of the design space.<<ETX>>

CAD challenges in multimedia computing

This tutorial surveys the present and future of multimedia computing systems and outlines new challenges for CAD presented by these systems. Multimedia computing is a challenging domain for several reasons: it requires both high computation rates and memory bandwidth; it is a multirate computing problem; and requires low-cost implementations for high-volume markets. As a result, the design of multimedia computing systems introduces new challenges for CAD at all levels of abstraction, ranging from layout to system design. After surveying the nature of the multimedia computing problem, we examine two experiences in multimedia computer design from a CAD perspective: the design of VLSI systems-on-chips for multimedia: and the successive refinement of an application from software to a high-volume chip using advanced CAD synthesis tools.

Techniques for fast circuit simulation applied to power estimation of CMOS circuits

We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses stepwise equivalent conductance and piecewise linear waveform approximation. The power estimator has been implemented in the SWEC framework. Experimental results indicate that SWEC can obtain a substantial speed-up over HSPICE while maintaining an accuracy of within 5-7%. Benchmark results on a suite of industry circuits, which include circuits that HSPICE could not handle, are presented.

Reconstruction of three-dimensional objects using a knowledge-based environment

This paper presents a knowledge-based technique forunderstanding and reconstructing a class of three-dimensional objects from their two-dimensional orthographic views commonly found in machine drawings and blueprints. The reconstruction procedure uses a volume-oriented approach and views a complex part as composed of a number of primitive subobjects. These subobjects are recognized using a model-guided recognition scheme, utilizing characteristic patterns of the primitives in different views. Features such as protrusions and cavities are recognized and the composite part is transferred to a CAD data base.

Tutorial I Embedded Memories In System Design From Technology To Systems Architecture

Summary form only given. The term system-on-silicon has been used to denote the integration of random logic, processor cores, SRAMs, ROMs, and analog ccimponents on the same die. But up to recently, one major component had been missing: high-density DRAMS. Today?s technologies allow the integration of such as data buffering, picture storage, and prograddata storage. In quarter-micron technology, chips with up to 128 Mbit of DRAM and 500 kgates of logic are eminently feasible. This enlarges the system design space tremendously since system architects arc no more restricted to standard commodity DRAMS. We will discuss the market for embedded DRAM applications as well as the associated challenges.

Embedded memories in system design - from technology to systems architecture

Dwcription: The term system-on-sficon has been used to denote the integration of random logic, processor cores, SRAMS, ROMs, and analog components on the same die. But up to recently, one major component had been missing: high-density DRAMs. Today’s technologies allow the integration of sigtilcant amounts of DW memory for applications such as data buffetig, picture storage, and progrtidata storage. h quarter-micron technology, chips with up to 128 Mbit of DRAM and 500 kgates of logic are eminently feasible. This enlarges the system design space tremendously since system architects are no more restricted to standard commodity DRAMs. We will discuss the market for embedded DRAM applications as well as the associated challenges. Next, the system design requirements from different apphcation domains WMbe anrdyzed in session two. The first part wH1focus on a 32-bit NSC processor with embedded DRAM in tie video processing context. It w~ include the processor micro architecture and organization rdong with some data on the process technology and design methodology. k a second part, harddisc-drive @D) contro~ers are addressed, which are a very typicrd application for an embedded DRAM solution. We wi~ high~ght design issues related to such systems on siticon (design flow, required views, W/SW-codesign, testing aspects). k part three, opportunities, ch~enges and trends in general-purpose processor architectures for embedded memory systems wi~ be discussed. The focus wi~ be on the recent architectural trends in highperformance microprocessor, including vector, VL~ and reconfigurable architectures, and the H project. We wi~ describe the strengths and disadvantages of each approach in terms of application performance, scdabtiity and design complexity.