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Dive into the research topics where Vikram Passi is active.

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Featured researches published by Vikram Passi.


Scientific Reports | 2017

Electrical properties of graphene-metal contacts

Teresa Cusati; Gianluca Fiori; Amit Gahoi; Vikram Passi; Max C. Lemme; Alessandro Fortunelli; Giuseppe Iannaccone

The performance of devices and systems based on two-dimensional material systems depends critically on the quality of the contacts between 2D material and metal. A low contact resistance is an imperative requirement to consider graphene as a candidate material for electronic and optoelectronic devices. Unfortunately, measurements of contact resistance in the literature do not provide a consistent picture, due to limitations of current graphene technology, and to incomplete understanding of influencing factors. Here we show that the contact resistance is intrinsically dependent on graphene sheet resistance and on the chemistry of the graphene-metal interface. We present a physical model of the contacts based on ab-initio simulations and extensive experiments carried out on a large variety of samples with different graphene-metal contacts. Our model explains the spread in experimental results as due to uncontrolled graphene doping and suggests ways to engineer contact resistance. We also predict an achievable contact resistance of 30 Ω·μm for nickel electrodes, extremely promising for applications.


european solid state device research conference | 2016

Contact resistance Study of “edge-contacted” metal-graphene interfaces

Vikram Passi; Amit Gahoi; Jasper Ruhkopf; Satender Kataria; F. Vaurette; E. Pallecchi; H. Happy; Max C. Lemme

The contact resistance RC of “edge-contacted” metal-graphene interfaces is systematically studied. Our experiments demonstrate a reduction of contact resistance by intentional patterning of graphene to create “edge contacts”. The parameter space for different hole patterns in graphene is explored. The contact resistance is reduced from 1518 Ωμm for structures without holes to 456 Ωμm in structures with holes of 500 nm diameter everywhere under the contact. These values were achieved at the Dirac point, i.e. at the point of minimum carrier density in graphene and they correspond to a reduction of 70%. These results provide a clear path towards higher performance in graphene based electronic devices, which are often limited by unreliable and high RC.


international electron devices meeting | 2015

Understanding the nature of metal-graphene contacts: A theoretical and experimental study

Teresa Cusati; Gianluca Fiori; Amit Gahoi; Vikram Passi; Alessandro Fortunelli; Max C. Lemme; Giuseppe Iannaccone

In this paper we propose a theoretical and experimental study of the nature of metal-graphene contacts. We use ab-initio simulations and semi-analytical modeling to derive and validate a simple two-parameter model of metal-graphene contacts. Such findings are supported by experimental results for large samples of different types of metal-graphene contacts.


joint international eurosoi workshop and international conference on ultimate integration on silicon | 2015

Spectral sensitivity of a graphene/silicon pn-junction photodetector

Sarah Riazimehr; Daniel S. Schneider; Chanyoung Yim; Satender Kataria; Vikram Passi; Andreas Bablich; Georg S. Duesberg; Max C. Lemme

We investigate the optical properties of graphene-silicon Schottky barrier diodes composed of chemical vapor deposited (CVD) graphene on n- and p-type silicon (Si) substrates. The diodes fabricated on n-Si substrate exhibit better rectifying behavior compared to p-Si devices in the dark. An ultra-broadband spectral response is achieved for n-Si diodes. The results are compared with the spectral response of a molybdenum disulfide (MoS2) - p-type silicon photodiode.


npj 2D Materials and Applications | 2018

Electrical devices from top-down structured platinum diselenide films

Chanyoung Yim; Vikram Passi; Max C. Lemme; Georg S. Duesberg; Cormac Ó Coileáin; E. Pallecchi; Dalal Fadil; Niall McEvoy

Platinum diselenide (PtSe2) is an exciting new member of the two-dimensional (2D) transition metal dichalcogenide (TMD) family. It has a semimetal to semiconductor transition when approaching monolayer thickness and has already shown significant potential for use in device applications. Notably, PtSe2 can be grown at low temperature making it potentially suitable for industrial usage. Here, we address thickness-dependent transport properties and investigate electrical contacts to PtSe2, a crucial and universal element of TMD-based electronic devices. PtSe2 films have been synthesized at various thicknesses and structured to allow contact engineering and the accurate extraction of electrical properties. Contact resistivity and sheet resistance extracted from transmission line method (TLM) measurements are compared for different contact metals and different PtSe2 film thicknesses. Furthermore, the transition from semimetal to semiconductor in PtSe2 has been indirectly verified by electrical characterization in field-effect devices. Finally, the influence of edge contacts at the metal–PtSe2 interface has been studied by nanostructuring the contact area using electron beam lithography. By increasing the edge contact length, the contact resistivity was improved by up to 70% compared to devices with conventional top contacts. The results presented here represent crucial steps toward realizing high-performance nanoelectronic devices based on group-10 TMDs.Nanofabrication: transport properties and device physics of layered PtSe 2Transport measurements on channels of layered PtSe2 give insight into the realization of high-performance nanoelectronic PtSe2 devices. A team led by Niall McEvoy at Trinity College Dublin investigated the electrical contact properties of PtSe2 channels with controlled dimensions and thicknesses. Electron beam lithography was used to fabricate structures with different contact metals and different PtSe2 film thicknesses, and the corresponding contact resistivity and sheet resistance of the PtSe2 devices were extracted from transmission line method measurements. The charge-transport characteristics of the PtSe2 devices revealed that edge-contacted structures are able reduce the contact resistivity when compared to conventional devices with top contacts, thanks to enhancement of the carrier injection at the contacts. These results may pave the way to optimal design of PtSe2 nanoelectronic devices.


international conference on microelectronic test structures | 2017

Detailed characterization and critical discussion of series resistance in graphene-metal contacts

Stefano Venica; Francesco Driussi; Amit Gahoi; Vikram Passi; Pierpaolo Palestri; Max C. Lemme; L. Selmi

We apply the contact-end resistance method to TLM structures in order to characterize the graphene-metal contact resistance. A critical analysis of the experimental results shows that the commonly used transmission line model fails to accurately describe the graphene-metal contact under specific biasing conditions. The experiments suggest the presence of an additional resistance contribution associated to the p-p+ junction induced in the graphene in the proximity of the contact. This voltage dependent resistance limits the range of applicability of the extraction technique. However, for carefully chosen bias conditions that reduce this additional resistance to small values, the technique provides reliable results, useful to investigate the graphene-metal contact properties and their technology dependence.


joint international eurosoi workshop and international conference on ultimate integration on silicon | 2016

Improved voltage gain in mechanically stacked bilayer graphene field effect transistors

Himadri Pandey; Satender Kataria; Vikram Passi; Mario Iannazzo; Eduard Alarcón; Max C. Lemme

Dual gated graphene field effect transistors (GFETs) were fabricated using mechanically stacked large area chemical vapor deposited (CVD) graphene bilayer. The devices were characterized in ambient conditions at various back gate voltages. Higher induced carrier densities were observed in the device channels at increasingly negative back gate voltages. Also, enhanced tendency to saturation was observed. These observations indicate that mechanically stacked bilayer GFETs can be potential candidates for future graphene circuit applications where a lower output conductance is desired for maximum intrinsic voltage gain.


european solid state device research conference | 2016

CVD graphene-FET based cascode circuits: A design exploration and fabrication towards intrinsic gain enhancement

Mario Iannazzo; Eduard Alarcón; Himadri Pandey; Vikram Passi; Max C. Lemme

This paper presents the design exploration of a basic cascode circuit (CAS) targeted to increase the intrinsic gain Aν of a graphene field-effect-transistor (GFET) by decreasing its output conductance go. First, the parameters of a large-signal compact-model, based on drift-diffusion carrier transport, are fit to measurements carried on 2 CVD GFETs, fabricated independently by different research groups. Second, CAS circuits are simulated to perform a design exploration and provide design guidelines. Third, CAS circuits are fabricated and consequently measured. Performance metrics are provided in terms of go, transconductance gm and hence Aν. Against these metrics, a quantitative comparison between CAS and GFET is performed and conclusions are derived.


AIP Advances | 2018

Graphene-insulator-semiconductor capacitors as superior test structures for photoelectric determination of semiconductor devices band diagrams

K. Piskorski; Vikram Passi; Jasper Ruhkopf; Max C. Lemme; H. M. Przewlocki

We report on the advantages of using Graphene-Insulator-Semiconductor (GIS) instead of Metal-Insulator-Semiconductor (MIS) structures in reliable and precise photoelectric determination of the band alignment at the semiconductor-insulator interface and of the insulator band gap determination. Due to the high transparency to light of the graphene gate in GIS structures large photocurrents due to emission of both electrons and holes from the substrate and negligible photocurrents due to emission of carriers from the gate can be obtained, which allows reliable determination of barrier heights for both electrons, Ee and holes, Eh from the semiconductor substrate. Knowing the values of both Ee and Eh allows direct determination of the insulator band gap EG(I). Photoelectric measurements were made of a series of Graphene-SiO2-Si structures and an example is shown of the results obtained in sequential measurements of the same structure giving the following barrier height values: Ee = 4.34 ± 0.01 eV and Eh = 4.70...


international conference on microelectronic test structures | 2017

The outstanding properties of graphene-insulator-semiconductor (GIS) test structures for photoelectric determination of semiconductor devices band diagram

Krzysztof Piskorski; Vikram Passi; Jasper Ruhkopf; Max C. Lemme; Henryk M. Przewlocki

The energy band diagram is a primary feature of any semiconductor device and determines its physical parameters and practical applicability. The most effective technique of band diagram characterization is the photoelectric measurement based on internal photoemission phenomena in the layered structures. In the technologically important metal-insulator-semiconductor (MIS) structures, the most important parameters of the band diagram are barrier heights on both sides of the insulator layer. In this article, we consider graphene-insulator-semiconductor (GIS) structures in which the graphene replaces metal as the gate material. Using graphene layer as the gate of the structure facilitates direct measurements of the photocurrent due to hole emission from the substrate into the insulator, allowing determination of the barrier height for holes. Having also measured the barrier height for electrons emitted from the substrate into the insulator the direct determination of the insulator band gap is possible.

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Eduard Alarcón

Polytechnic University of Catalonia

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