Vladimir Milovanovic

Design of Energy- and Cost-Efficient Massive MIMO Arrays

Large arrays of radios have been exploited for beamforming and null steering in both radar and communication applications, but cost and form factor limitations have precluded their use in commercial systems. This paper discusses how to build arrays that enable multiuser massive multiple-input-multiple-output (MIMO) and aggressive spatial multiplexing with many users sharing the same spectrum. The focus of the paper is the energy- and cost-efficient realization of these arrays in order to enable new applications. Distributed algorithms for beamforming are proposed, and the optimum array size is considered as a function of the performance of the receiver, transmitter, frequency synthesizer, and signal distribution within the array. The effects of errors such as phase noise and synchronization skew across the array are analyzed. The paper discusses both RF frequencies below 10 GHz, where fully digital techniques are preferred, and operation at millimeter (mm)-wave bands where a combination of digital and analog techniques are needed to keep cost and power low.

Low-power inductorless RF receiver front-end with IIP2 calibration through body bias control in 28nm UTBB FDSOI

A compact energy-efficient receiver front-end designed and implemented in 28nm UTBB FDSOI CMOS supports in-device coexistence of Bluetooth (BT) with an LTE FDD Band 7 transmitter module. The receiver is based on an inductorless low-IF current-mode LNTA-first architecture and features IIP2 calibration. IIP2 improvement is implemented through the body bias of the passive mixer switching pairs. The fabricated receiver has an active area of 0.12mm2, power consumption of 4.4mW, achieves IIP2 improvement of over 25dB through body bias tuning, NF of 8.6dB and gain of 26.7dB, all within BT specification.

On-chip I–V variability and random telegraph noise characterization in 28 nm CMOS

Building reliable mixed-signal circuits in advanced process technologies requires an accurate understanding of device performance and variability. This work presents an on-chip transistor characterization platform built on a digital focal plane array readout circuit framework that enables highly parallel device measurements to be taken in the digital domain. This technique is used to quickly assess large-scale transistor characteristics and study the impact of random telegraph noise (RTN) in deeply scaled technologies. A 28 nm HKMG bulk LP CMOS test chip containing over 80,000 NFETs and PFETs of multiple sizes and threshold voltages was fabricated and tested to study device parameters and RTN performance down to cryogenic temperatures. Results support previous studies of RTN temperature dependence and suggest that threshold voltage has minimal impact on RTN relative to device type and dimension.

Launching University Ventures—Policies, Financing and Strategy

One of the main tasks of institutional framework creators is cultivating adequate productive enviroment for university ventures development. The university ventures should be specifically fertile for research and development commercialization and support and for positioning universities as profitable units within the educational system. The idea is to create supportive programs where research activities can migrate to the actual business environment, produce desirable products and/or services, compete on the market and generate profit.

An FMCW fractional-N PLL-based synthesizer for integrated 79 GHz automotive radar sensors

A fully-integrated and highly linear 79 GHz FMCW synthesizer that is based on fractional-N PLL and intended for automotive radar applications is presented. The frequency synthesizer covers complete automotive band 77–81 GHz of interest and is able to generate complex modulation waveforms with up to 16 different chirp slopes in the single modulation scheme. This helps eliminating potential ghost targets in multitarget environments by careful radar signal post-processing. High chirp linearity with the worst-case frequency error that is lower than 200 kHz across the full 4 GHz tuning range enables high ranging and radial velocity resolutions. The proposed FMCW synthesizer occupies 1.8mm2 of area and dissipates 0.35 W as a stand-alone chip solution in the standard SiGe:C HBT 130nm BiCMOS process technology.

The analysis of choice influence in fatigue failure criteria on integrity assessment of wagon structure

This paper presents the S-N approach to fatigue failure analysis of welded joints that integrates well with finite element modelling. Goodmans criterion and fatigue criterion based on the equivalent stress range were used for the analysis of the fatigue failure. Goodmans criterion and fatigue criterion based on the equivalent stress range, for determining fatigue safety factor, are implemented in the software package for finite element analysis PAK. Numerical calculation of fatigue safety factor was determined to assess the integrity of wagon structure parts according to the most commonly used European standards for wagon analysis. According to failure safety factors obtained by Goodmans criterion and fatigue criterion based on the equivalent stress range it should be noticed that both methods give good results. Both criteria give us adequate identification causes of cracking on the underframe of wagon for containers transportation. The obtained results and their well matching prove reliability of both fatigue failure criteria and that they can be used for integrity assessment of wagon structure parts.