Vladimir V. Petrovic

Design methodology for fault tolerant ASICs

The sensitivity of application specific integrated circuits (ASICs) to the single event effects (SEE) can induce failures of the systems which are exposed to increased radiation levels in the space and on the ground. This paper presents a design methodology for a full fault tolerant ASIC that is immune to the single event upsets (SEU) in sequential logic, the single event transients (SET) in combinational logic and the single event latchup (SEL). The dual modular redundancy (DMR) and a SEL power-switch (SPS) are the basis for a modified ASIC design flow. Measurement results have proven the correct functionality of DMR and SPS circuits, as well as a high fault tolerance of implemented ASICs along with moderate overhead in respect of power consumption and occupied silicon area.

SEU and SET fault injection models for fault tolerant circuits

In this paper we describe the fault injection models for the systems tolerant to the single event upsets (SEU) and single event transients (SET). The presented fault modelling approach is based on the random generated SEU faults in sequential logic and SET faults in combinational logic. The fault injection models for triple modular redundant (TMR) and dual modular redundant (DMR) circuits are developed in order to simulate the fault-tolerant systems. The analytical models for calculation of the probability of failure-free TMR and DMR circuits are defined too. To justify the reduced redundancy concept, the simulated and calculated probabilities of failure-free TMR and DMR circuits are presented and discussed. The obtained results show a better trade-off between hardware overhead and circuit failure-free probability of the DMR concept.

Design Flow for Radhard TMR Flip-Flops

Protection against radiation effects in digital ASICs chip can be achieved using different design approaches. One of the popular approaches for increasing the reliability is the hardware triplication. However, the hardware triplication does not mean that the susceptibility to radiation effects can be automatically overcome. The automatic random placement of standard cells can result in higher power consumption and more occupied silicon area), with marginal improvement of the linear energy transfer threshold (LET) value. Additionally, the TMR approach usually requires changes in the standard ASIC design flow, even requesting significant modifications of the RTL code. In this paper, we will investigate the issues of design flow for TMR flip-flops, addressing both the issues of compliance to the standard ASIC design methodology, enabling the use of non-modified RTL code, as well as the layout generation of radhard TMR flip-flops, based on standard non-hardened flip-flop components.

Fault-tolerant TMR and DMR circuits with latchup protection switches

Abstract The paper presents CMOS ASICs which can tolerate the single event upsets (SEUs), the single event transients (SET), and the single event latchup (SEL). Triple and double modular redundant (TMR and DMR) circuits in combination with SEL protection switches (SPS) make the base of the proposed approach. The SPS had been designed, characterized, and verified before it became a standard library cell. A few additional steps during logic synthesis and layout generation have been introduced in order to implement the redundant net-lists and power domains as well as to place the latchup protection switches. The approach and accompanying techniques have been verified on the example of a shift-register and a middleware switch processor.

Mobile Phone Antenna Performance and Power Absorption in Terms of Handset Size and Distance from User's Head

In this work numerical simulation and measurements of three-dimensional radiation patterns of a mobile handset model in the presence of a human head phantom were performed at 1800 MHz. Based on theoretical and experimental results, the influence of the human head on the radiation efficiency of the handset has been investigated as a function of the handset size and the distance between the head and the handset during its operation. Furthermore, the relative amount of the electromagnetic power absorbed in the head has been obtained. It was found that significant reduction of the absorbed power (about 50%) with proportional increment of the handset radiation efficiency could be achieved by moving the phone for 1 cm only away from the head. Agreement between theoretical and experimental results was found to be very good.

Strong FEM solution for the square coaxial line

In this paper the strong FEM formulation based on hierarchical basis functions of higher order and Galerkin method is proposed. This physically means that the boundary conditions-continuity of the electric potential V and of the normal component of vector D, on element boundaries are exactly satisfied. As a benchmark example, a coaxial transmission line of the square cross section is analyzed.

Efficient method of moment analysis based on imaging and edging

Electromagnetic modeling of composite metallic and dielectric structures (antennas, scatterers, microwave circuits, etc.) in the frequency domain can be efficiently performed by applying the method of moments (MoM) to the surface integral equations (SIEs). Particularly, a high efficiency is achieved by using double polynomial approximations for currents over quadrilateral patches, where expansion orders are directly proportional to the electrical length of these patches. The exception occurs when a global solution for currents is strongly affected by local quasi-static effects (end effect and proximity effect). For example, the authors consider a microstrip line whose transversal dimensions are small comparable with the wavelength. The main goal is to determine non-uniform segmentation which enables the treatment of local quasi-static effects with the lowest number of unknowns. In that sense two techniques are proposed: imaging and edging.

Network Centric Systems for Space Applications

Serious problems we face within avionics development of every new spacecraft are: the huge cost and long development time due to the interfaces specification, which has to be written and specified for every satellite from scratch. Furthermore we must consider the extremely high costs and almost no post-development reuse of the board computer. Our strategy is what we call network centric computing. We aim to create a spacecraft area network (SCAN) to which all devices and computers are attached. We aim to create a high speed interconnection link definition, which is so simple that it can be implemented and used by each and every one. We have already developed reference implementations, which will be distributed as open source for both field programmable gate array (FPGA) intellectual property (IP) cores and software middleware. The presented SCAN middleware switch is currently in development in Europe as an application specific integrated circuit (ASIC).

Formulation of microwave circuit equations: An educational viewpoint

A pedagogical approach to formulation of microwave circuit equation is presented. The approach is based on writing equations for microwave junctions and definition equations specifying microwave elements. A checklist for setting-up the correct number of independent equations is given and is targeted at students or educators who solve microwave circuits analytically by hand or by means of a computer algebra system.

Comparison of MoM/SIE, MoM/VIE and FEM based on topological analysis of two canonical problems

Analysis of composite metallic and dielectrics structures placed in a time-harmonic electromagnetic field is usually based on the MoM (Method of Moments), or FEM (Finite Element Method). Particularly, if MoM is applied to SIE (Surface Integral Equation), the method is termed as MoM/SIE, and if MoM is applied to VIE (Volume Integral Equation), the method is termed as MoM/VIE. Besides that, all these methods can be mutually combined giving different types of hybrid methods. The authors present a comparison of the MoM/SIE, MoM/VIE and FEM methods based on a topological analysis of two canonical problems.