W. Buttler

The MPI/AIT X-ray imager (MAXI) — High speed pn CCDs for X-ray detection

MAXI (MPI/AIT X-ray Imager) is part of a proposal submitted to the European Space Agency (ESA) as focal plane instrumentation of the X-ray Multi Mirror Mission (XMM). Within a collaboration of 13 European institutes we have proposed a fully depleted (sensitive) pn CCD of 280 μm thickness with a homogeneous sensitive area of 36 cm2 and a pixel size of 150×150 μm2 which is well matched with the telescopes angular resolution of 30 arcsec translating to a position resolution of approximately 1 mm in the focal plane. The X-ray sensitivity will be higher than 90% from 250 eV up to 10 keV, the readout time in the full frame mode of the complete focal plane will be 2 ms with a readout noise of better than 5 e− (rms). Prototypes of all individual components of the camera system have been fabricated and tested. The camera concept will be presented. The measured transfer properties of the CCD and the on-chip electronics will be treated. Taking into account the coupling of the on-chip amplifier to the following front-end electronics the expected performance will be derived.

Evolution in the criteria that underlie the design of a monolithic preamplifier system for microstrip detectors

Abstract Several steps through which the design of a monolithic preamplifier system for microstrip detectors has passed, are critically analyzed. From the very initial MOSFET version, several measures were gradually taken with the purpose of reducing noise. The latest design criteria aim at realizing a preamplifier system which, besides outstanding noise performances, features also a suitable degree of radiation tolerance.

Low noise monolithic CMOS front end electronics

Abstract Design considerations for low noise charge measurement and their application in CMOS electronics are described. The amplifier driver combination whose noise performance has been measured in detail as well as the analog multiplexing silicon strip detector readout electronics are designed with low power consumption and can be operated in pulsed mode so as to reduce heat dissipation even further in many applications.

Low noise-low power monolithic multiplexing readout electronics for silicon strip detectors

Abstract A 128 channel readout chip suitable for readout with 50 μm pitch has been developed in CMOS technology. It provides signal amplification, parallel data storage and serial readout. Switched capacitor technique is used for noise reduction by multicorrelated sampling and simultaneously for second stage amplification. Power consumption is controlled by an externally applied reference voltage thereby allowing for an optimization of speed and noise versus power consumption for the individual needs of the particular experiment. Pulsed mode operation for further reduction of heat dissipation is easily possible without cutting the supply voltages. Very good noise performance (250+45 C D [pF] electrons) low input impedance ( C eff > 200 pF) and large amplification (70 mV/fC) have been obtained at very low power consumption (1.6 mW per channel). The chip may be used for both synchronous (e.g. collider) and asynchronous (fixed target) applications where the time of the event is not known in advance. A second version with only 64 channels suitable for 100 μm pitch is in preparation. Further developments presently under way include the introduction of combinded CMOS-JFET technology.

Noise filtering for readout electronics

Abstract Filtering and signal processing is important for readout systems. The filtering principle we present is suitable for integrated readout electronics. The transfer function is independent of the process parameters and can be easily changed by a variation of the sampling frequency.

Short channel, CMOS-compatible JFET in low noise applications☆

Abstract An N-channel JFET with 1.6 μm gate length has been realised in the CMOS-compatible technology. Such a device is intended as the basic front-end element in the development of new low noise circuits of large bandwidth. This paper presents the results of a full device characterisation concerning small signal behaviour, noise spectral densities and noise sensitivities to absorbed radiation. The performances of some monolithic circuits employing the short channel JFET as an input element, among them preamplifiers tailored to different detector capacitances, an entire analog processor for microstrip detectors and a multichannel preamplifier system are discussed.

The ALEPH minivertex detector

Abstract Vertex detectors allow high precision reconstruction of particle tracks and therefore make possible the investigation of the decay topology of short-lived particles in collider experiments. In the ALEPH experiment at LEP a minivertex detector will be installed. It consists of silicon microstrip detectors arranged on two concentric “cylindrical” surfaces around the interaction point. With this geometry it will be possible to measure the r − ϕ − z coordinates of particles traversing the detector. The expected position resolution is 10 μm in r − ϕ and 20 μm in r − z . For optimum signal processing monolithic CMOS readout electronics are under development. Each chip consists of 60 charge sensitive preamplifiers, multiplexed into one output channel. Fast power switching will reduce heat dissipation. Details about construction and expected device performance will be described.

ROTOR: the VLSI switched current amplifier for high-rate high-resolution spectroscopy with asynchronous event occurrence

In this paper the authors present a novel JFET/CMOS signal processor, ROtational TrapezOidal Readout (ROTOR), conceived for high-rate high-resolution X-ray spectroscopy with asynchronous event occurrence. The circuit is of time-variant nature, uses no fast channel as a trigger, and displays a quasitrapezoidal weight function with virtually no exponential tail. Such a finite-width weight function is typically nearly optimal for submicrosecond processing times and is adequate when intense radiation fluxes must be handled. The filter also permits us to suppress possible ballistic deficits.

JFET-CMOS microstrip front-end

Abstract While the CMOS version of the front-end chip developed for the microstrip vertex detector of the Aleph experiment is ready to go into operation, a new development is being carried on to achieve a reduction in noise. The improvement is related to the use of a JFET-CMOS chip design which is described in the present paper.

Readout of double-sided silicon strip detectors with high density detectors with high density integrated electronics

The authors describe the readout system that has been developed for the ALEPH minivertex detector at LEP. The design makes use of capacitively coupled double-sided silicon strip detectors and custom-designated low-noise VLSI CMOS electronics, mounted on ceramic carriers which simultaneously serve as mechanical support and substrates for thick-film hybrid circuitry. The amplification of as many as 1536 analog channels of information using only 30 input/output lines is realized. The detector system with its peripheral driving and readout electronics is described, and first test results with a light source and a particle beam are given. >