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Dive into the research topics where W.M. Chen is active.

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Featured researches published by W.M. Chen.


Microelectronic Engineering | 2003

Evaluation of mechanical stresses in silicon substrates due to lead-tin solder bumps via synchrotron X-ray topography and finite element modeling

J. Kanatharana; J.J. Pérez-Camacho; T. Buckley; Patrick J. McNally; T. Tuomi; M. O'Hare; D. Lowney; W.M. Chen; R. Rantamäki; Lauri Knuuttila; Juha Riikonen

Solder-based flip-chip packaging has prompted interest in integrated circuit (IC) packaging applications due to its many advantages in terms of cost, package size, electrical performance, input/output density, etc. The ball grid array (BGA) is one of the most common flip-chip packaging techniques used for microprocessor applications. However, mechanical stresses induced by the flip-chip process can impact adversely on the reliability of products. Synchrotron X-ray topography (SXRT), a non-destructive technique, has been employed to investigate the spatial extent of strain fields imposed on the underlying silicon substrate for Intel® Pentium® III microprocessors due to the lead-tin solder bump process for BGA packaging. Large area and section back-reflection SXRT images were taken before and after a simulation of the reflow process at 350 °C in atmosphere. The presence of induced strain fields in the Si substrate due to the overlying bump structures has been observed via the extinction contrast effect in these X-ray topographs. In addition, orientational contrast effects have also been found after the reflow process due to the severe stresses in the underlying silicon beneath the lead bumps. The estimated magnitudes of stress, |σ|, imposed on the underlying silicon were calculated to be of the order of 100 MPa. The spatial strains in the underlying silicon were relieved dramatically after the lead bumps were removed from the wafer, which confirms that the bumps are indeed a major source of strain in the underlying Si. Finite element modeling (FEM) has also been performed in two-dimensional (2-D) plane strain mode. The magnitudes and spatial distribution of the stresses after the reflow process are in good agreement with the SXRT results.


Journal of Crystal Growth | 2002

Synchrotron X-ray topography of undoped VCz GaAs crystals

T. Tuomi; Lauri Knuuttila; Juha Riikonen; Patrick J. McNally; W.M. Chen; J. Kanatharana; M. Neubert; P. Rudolph

For the first time vapour pressure controlled Czochralski (VCz) monocrystals of semi-insulating (SI) GaAs, grown at IKZ Berlin, have been investigated by synchrotron X-ray topography. The X-ray topographs of a typical VCz sample, taken from the cylindrical part, show dislocation images resembling those of SI vertical gradient freeze-grown GaAs crystals. From the disappearance of the dislocation image in selected topographs it is concluded that the Burgers vector for most dislocations is parallel to . The main part proves to be of 60° type. The cellular structure, typical for liquid encapsulated Czochralski material, is not seen in the VCz samples. Large volumes up to 0.5 x 0.5 × 0.5 mm 3 are dislocation-free. The results are compared with etch pit density (EPD) measurements from the same crystals. The average EPD is (1-2) x 10 4 cm -2 . The minimum value along is 2 × 10 3 cm 2 .


Journal of Crystal Growth | 2003

Dislocation analysis for heat-exchanger method grown sapphire with white beam synchrotron X-ray topography

W.M. Chen; Patrick J. McNally; Yu.V. Shvyd’ko; T. Tuomi; M. Lerche

Abstract Dislocations in high quality Heat-Exchanger Method (HEM) produced sapphire were analyzed with the white beam large area transmission synchrotron X-ray topography technique. After analysis the dislocations for different Laue spots, i.e. different diffraction vectors, in one recorded film, three kinds of dislocations, i.e. screw, edge and mixed dislocations were identified in the studied HEM sapphire, but most are mixed type, whose Burgers vectors belong to the two groups of 〈2 1 1 0〉 and 〈1 0 1 0〉 .


Semiconductor Science and Technology | 2002

Examination of mechanical stresses in silicon substrates due to lead–tin solder bumps via micro-Raman spectroscopy and finite element modelling

J. Kanatharana; J.J. Pérez-Camacho; T. Buckley; P.J. McNally; T. Tuomi; Juha Riikonen; M. O'Hare; D. Lowney; W.M. Chen; R. Rantamäki; Lauri Knuuttila

Due to the fact that semiconductor devices have decreased significantly in geometry and increased enormously in electronic design complication, flip-chip packaging technology was launched to increase input/output count, improve electrical performance, reduce packaging size and be cost effective. The Intel®Pentium®III microprocessor uses the popular ball grid array (BGA) packaging technique. BGA is one of the most common flip-chip packaging techniques used for microprocessor applications. However, mechanical stresses induced by the flip-chip process are major concerns for the reliability of such devices. Micro-Raman spectroscopy (μRS) is a powerful technique for investigating the spatial extent of strain fields in microelectronic devices. In this study, the strain fields imposed on the underlying silicon substrate due to the lead–tin solder bump process in BGA packaging have been investigated in pre- and post-reflowed samples using μRS and finite element modelling (FEM). For pre-reflowed samples, an approximate uniaxial compressive stress of 200 MPa is developed near the edge of the under bump metallization (UBM). However, a tensile stress up to ~300 MPa is found for post-reflowed samples. Two-dimensional (2D) plane strain FEM has also been performed. The magnitudes and spatial distribution of the stresses after the reflow process are in good agreement with the micro-Raman results.


Journal of Crystal Growth | 2002

Determination of crystal misorientation in epitaxial lateral overgrowth of GaN

W.M. Chen; Patrick J. McNally; Koen Jacobs; T. Tuomi; Z. R. Zytkiewicz; D. Lowney; J. Kanatharana; Lauri Knuuttila; Juha Riikonen

Epitaxial lateral overgrowth of GaN on Al2O3 using a SiO2 mask with different fill factors (ratio of stripe opening width to stripe period) is examined with synchrotron X-ray topography (SXRT) and X-ray diffraction (XRD) techniques. The crystal misorientation in the lateral overgrown region (wing) and the normal region (window region and beneath the seed layer) is determined with SXRT. The wings tilt asymmetrically around the window and the tilts increase as the fill factor increases. XRD measurements confirm the same wing tilt tendency as the fill factor changes. The average wing tilt reaches approximately 1600 arcsec measured using the X-ray rocking curve method at a fill factor of 0.625, but the maximum wing tilts can reach values as large as 2400 arcsec measured by SXRT when the fill factor is only 0.571. The significance of this is explained. The crystal misorientation in the normal region is approximately an order of magnitude less than the wing tilt. r 2002 Elsevier Science B.V. All rights reserved.


Physica Status Solidi (a) | 2001

Quality Assessment of Sapphire Wafers for X-Ray Crystal Optics Using White Beam Synchrotron X-Ray Topography

W.M. Chen; Patrick J. McNally; Yu. V. Shvyd'ko; T. Tuomi; M. Lerche; J. Kanatharana; D. Lowney; M. O'Hare; Lauri Knuuttila; Juha Riikonen; R. Rantamäki

The white beam Synchrotron X-Ray Topography (SXRT) technique was used to assess the quality of sapphire wafers grown by the Heat-Exchanger Method (HEM) and the Modified Czochralski Method (MCM). Sapphire is a potential new material for X-ray crystal optics, especially for use as Bragg backscattering mirrors for X-rays and Mossbauer radiation. The dislocation distribution, dislocation density and Burgers vector of selected dislocations and stacking faults in the sapphire wafers were studied. A correlation between the sapphire quality and its performance as an X-ray backscattering mirror was established in this paper. The results reveal the high quality of the inspected HEM sapphire wafers and their subsequently improved performance as Bragg backscattering mirrors.


Journal of Materials Science: Materials in Electronics | 2003

Stress characterization of device layers and the underlying Si1-xGex virtual substrate with high resolution micro-Raman spectroscopy

W.M. Chen; P.J. McNally; G. Dilliway; J.M. Bonar; T. Tuomi; A. F. W. Willoughby

Silicon–germanium (Si–Ge) epitaxially grown mismatched heterostructures are becoming increasingly important for high-frequency microelectronics applications. One option under serious consideration is that of using Si–Ge virtual substrates, i.e., compositionally graded layers designed to accommodate the lattice mismatch between the underlying Si substrate and the overlying active epilayers(s). This assists in the prevention of misfit dislocations that can impact adversely on the active device regions. The stress in both device silicon cap layers and the underlying Si1−xGex virtual substrates is characterized with high-resolution micro-Raman spectroscopy (μRS). The device layers of the samples studied composed of a 7-nm thick silicon channel, a 6-nm thick SiGe layer and were capped with a 7-nm thick silicon layer. The device layers are grown over a 1-μm thick constant composition Si0.70Ge0.30 virtual substrate capping layer, and the Si-Ge virtual substrate is grown on a p+-type (0 0 1) silicon wafer with a thickness of about 500 μm. μRS measurement results with a 488-nm Ar+ visible laser source indicate that the Si0.70Ge0.30 capping layer at the virtual substrate is fully unstrained, while the top silicon cap layer is in extremely high tension. The use of a 325-nm HeCd UV laser for the μRS measurements, which probes only a very small depth into the Si cap layer (approximately 9 nm) confirms this high tensile stress is in the top silicon cap layer. The tensile stress in the top silicon cap layer is estimated to be as large as 2.4 GPa by analyzing the shift of the Si Raman peak with respect to the standard strain-free silicon sample. The measured stress value is almost equal to the theoretically predicted tensile stress that should exist in the fully strained Si cap layer. This implies that the Si cap layer remains strained in samples with this structure.


Journal of Materials Science: Materials in Electronics | 2003

Tilted-wing-induced stress distribution in epitaxial lateral overgrown GaN

W.M. Chen; Patrick J. McNally; J. Kanatharana; D. Lowney; Koen Jacobs; T. Tuomi; Lauri Knuuttila; Juha Riikonen; Juha Toivonen

Epitaxial lateral overgrowth (ELO) is one of the most extensively studied techniques used to improve the mismatched heteroepitaxy of GaN on sapphire (α-Al2O3) substrates. In this method, a mask is first deposited over the GaN seed layer and parallel windows are opened along a specific direction in the mask. GaN is grown vertically at the window position and then grows laterally along the mask surface (wing region). The adjacent GaN regions will coalesce to form a continuous film if enough growth time is used. The impact of the ELO of GaN on sapphire substrates using a SiO2 mask is measured with the white beam synchrotron X-ray topography technique. The topography results show that the crystal planes in the laterally overgrown regions (wings) are tilted. The maximum wing tilt is about 0.36° at a fill factor of 0.5 (fill factor measures the window width relative to the window width plus SiO2 mask width). High-resolution micro-Raman spectroscopy stress-mapping measurements, using Ar+ 488-nm laser excitation, indicate that the GaN epilayer is under compressive stress, as is expected from the growth conditions. The measured average compressive stress is about 460 MPa. Furthermore, a wave-like stress field is observed in the ELO GaN epilayer. The wave valley (low compressive stress region) is usually located at the coalesced region between two adjacent wings. In general, these coalesced regions exhibit about 60 MPa lower compressive stress than the average stress in the ELO epilayer. Voids formed by the tilted wings at the coalesced region are regarded as a possible reason for the lower compressive stress in the coalesced region.


Journal of Physics D | 2003

Mapping of mechanical stresses in silicon substrates due to lead?tin solder bump reflow process via synchrotron x-ray topography and finite element modelling

J. Kanatharana; J J P rez-Camacho; T. Buckley; Patrick J. McNally; T. Tuomi; M. O'Hare; D. Lowney; W.M. Chen; R Rantam ki; Lauri Knuuttila; Juha Riikonen


MRS Proceedings | 2001

Investigation of Mechanical Stresses in Underlying Silicon due to Lead-Tin Solder Bumps via Synchrotron X-Ray Topography and Finite Element Analysis

J. Kanatharana; J.J. Pérez-Camacho; T. Buckley; Patrick J. McNally; T. Tuomi; M. O'Hare; D. Lowney; W.M. Chen

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T. Tuomi

Helsinki University of Technology

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D. Lowney

Dublin City University

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Lauri Knuuttila

Helsinki University of Technology

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M. O'Hare

Dublin City University

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R. Rantamäki

Helsinki University of Technology

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