Wade Lowdermilk

Cost effective, versatile, high performance, spectral analysis in a Synthetic Instrument

This paper described a versatile block of signal conditioning options that process raw data samples from the A/D converter and deliver a filtered and resampled version of those data samples to a conventional FFT based spectrum analyzer. The conditioning performs a number of important processing functions. These include spectral translation to baseband, noise bandwidth reduction to signal bandwidth, and arbitrary resampling to obtain specified spectral spacing with available sized FFTs. The versatility of an FPGA based processor and signal conditioning block enables the use of the signal conditioner blocks to align sample rate with transform sizes without the need to vary input sample clock rate or the cut off bandwidth of analog anti-alias filters in the signal path. A straw man set of specifications for the spectrum analyzer was proposed and used as the basis of the simulations presented in this paper. The processing described here reflects the great versatility and flexibility available to the system designer. Broader bandwidths and greater dynamic range options can be quickly accommodated in the architecture presented here.

Finite Arithmetic Considerations for the FFT Implemented in FPGA-Based Embedded Processors in Synthetic Instruments

An important trend in the synthetic instrument community is the development of products around the capabilities of field programmable gate array (FPGA) based embedded processors. It is assumed here that signals arrive at the FPGA input at high data rates, low to medium data bit width, and low to medium signal-to-noise ratio. As a consequence of the processing that reduces signal bandwidth, the data bit width is increased in concert with the increased signal-to-noise ratio resulting from the reduced bandwidth. The FPGA has the unique capability to allocate its internal resources in an optimal way to best match the dynamic range of the sampled data signal at various points in the signal flow path. Since the fast Fourier transform (FFT) is primarily a tool in the synthetic instrument, the effect of fixed point arithmetic on its performance is reviewed, and suggested bit width assignments for FFT algorithms are presented. Computational noise in the FFT is due to finite bit width input data, finite bit width sine-cosine tables, finite bit width multipliers and accumulators, and distributed scaling between data passes. The noise generated by these contributors is not uniform over the frequency band and a number of mechanisms to minimize the noise contribution to the measurement process performed by the synthetic instrument are presented.

Wide spectral span Spectrum Analysis with an analog step and dwell translation pre-processor to a high dynamic range FFT based spectrum analyzer

This paper describes a new high speed Spectrum Analysis technique that tiles a spectral display using a rapid step and dwell spectral sweep. The step and dwell translation operates as a block down converter that translates successive frequency spans to an IF filter which is sampled, A-to-D converted, and processed by a high dynamic range FFT spectrum analyzer. The step and dwell sweep of the analog block down converter enables sequential spectral probes reminiscent of a swept frequency analyzer. The windowed FFT performed during the dwell synthesizes a parallel filter bank that partitions the spectral span into the same resolution bands as an FM spectral sweep through the same spectral span. By performing this second partition in parallel rather than sequentially we can reduce the time duration required to sweep the desired spectral span or we can implement post detection averaging by performing multiple FFTs during each dwell interval. The rapid spectral sweeps that can be realized by this technique make the analyzer well suited for analyzing transient and non periodic input signals.

Vector signal analyzer implemented as a synthetic instrument

Synthetic Instruments use the substantial signal processing assets of a field programmable gate array (FPGA) to perform the multiple tasks of targeted digital signal processing (DSP) based instruments. The signal conditioning common to many instruments includes analog spectral translation, filtering, and gain control to align the bandwidth and dynamic range of the input signal to the bandwidth and dynamic range capabilities of the A-to-D converter (ADC) which moves the signal from the analog domain to the sampled data domain. Once in the sampled data domain, the signal processing performed by the FPGA includes digital spectral translation, filtering, and gain control to perform its chartered DSP tasks. A common DSP task is spectral analysis from which frequency dependent (i.e., spectral) amplitude and phase is extracted from an input time signal. Another high interest DSP task is vector signal analysis from which time dependent (i.e., temporal) amplitude and phase is extracted from the input time signal. With access to the time varying amplitude-phase profiles of the input signal, the vector signal analyzer can present many of the quality measures of a modulation process. These include estimates of undesired attributes such as modulator distortion, phase noise, clock-jitter, l-Q imbalance, inter-symbol interference, and others. Here, the boundary between synthetic instruments (SI) and software defined radios (SDR) becomes very thin indeed. Essentially this is where the SI is asked to become a smart SDR, performing all the tasks of a DSP radio receiver and reporting small variations between the observed modulated signal parameters and those of an ideal modulated signal. Various quality measures (e.g., the size of errors) have value in qualifying and probing performance boundaries of communication systems.

Implementing Recursive Filters with Large Ratio of Sample Rate to Bandwidth

The poles of a recursive filter shift their position when the polynomial coefficients are quantized and represented with fixed bit width approximations. This sensitivity is quite severe for high-order low-bandwidth filters. At best the root shift may cause significant deviation in spectral response, and at worst is responsible for instability in many filter designs. Narrowband filters also exhibit large numerical gain which lead to extended bit width internal registers and extended width multipliers. We address techniques to implement high order very low-bandwidth recursive lowpass filters without the brute force requirement for extended precision coefficients and registers.

Implementation Considerations and Performance Comparison of Variable Bandwidth FIR Filter and Phase Equalized IIR Filter

The number of taps in a FIR filter varies inversely with the filters transition bandwidth. A FIR filter with variable bandwidth and with a proportional transition bandwidth must also be of variable length. To avoid changing the number of taps in the FIR filter we describe a phase equalized IIR filter with weights that can be tuned to obtain the variable bandwidth, variable length impulse response without requiring a variable number of multiplies.

Advantage and implementation considerations of shaped OFDM signals

This paper presents the structure and measured performance of a modem designed to implement a variant of OFDM known as shaped OFDM. Individual complex sub-carriers matching the mutually orthogonal tones of a Fourier transform with time span of MT seconds form a standard OFDM signal. The amplitudes of the orthogonal sinusoids are obtained by a DFT of uniformly spaced samples of the time function. An interfering tone within the frequency span of the OFDM signal may interfere with all the OFDM channels. The interference can be isolated to a few OFDM channels by replacing the rectangle envelope with a shaped envelope. The shaping controls the side lobe levels of the individual channel spectra and thus suppress the projection of an inter channel interfering signal. To maintain a fixed system throughput, the time span of the OFDM frame is lengthened and the adjacent frames are overlapped.

Proportional bandwidth spectrum analysis in a synthetic instrument

Spectrum analyzers used in communication systems are traditionally modeled by a bank of filters with equally spaced frequency centers and bandwidths. This type of spectrum analyzer decomposes the input signal into basis functions that share common features such as time extent and bandwidth. Another important class of spectrum analyzers is the proportional bandwidth spectrum analyzer modeled by a bank of filters where the spacing between spectral centers and bandwidths increase as a function of the frequency of interest. The filter spacing and bandwidth are seen to have equally spaced centers and equal bandwidths on a logarithmic scale. This type of spectrum analyzer decomposes the input signal into basis functions that share a scaled range of features such as varied time duration and varied bandwidths. Analysis of mechanical systems such as vibrating beams, acoustic resonators, cochlear of the human ear, whale and dolphin sounds, harmonic-rich FM waveforms, and image features are best performed by proportional bandwidth analyzers. This paper presents and analyzes the performance of an extremely efficient implementation of a proportional bandwidth filter bank.

On the implementation of a transciever to demodulate 384 MP3 satellite channels and remodulate them as 384 FDM stereo FM channels for cable distribution

We describe the implementation of a unique digital transceiver system. This system decodes up to 384 MP3 stereo audio signals received from a satellite downlink. It digitally remodulates the multiple sampled data signal sets as analog FDM signal composed of dbx [1] (noise reduction system) encoded FM stereo signals. The MP3 decoding is performed by 48 Analog Devices Blackfin Processors. The dbx encoding, system specific stereo FM modulation and re-sampling channelizer is performed in a single Xilinx Virtex-4 XC4VSX55 FPGA. The FPGA outputs a single sampled data stream of channelized FDM signal spanning approximately the 20-to-80 MHz frequency band. The emphasis of this paper is the tasks performed in the FPGA based modulator.