Wajid Hassan Minhass

System-level modeling and synthesis of flow-based microfluidic biochips

Microfluidic biochips are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis on-chip. There are several types of microfluidic biochips, each having its advantages and limitations. In this paper we are interested in flow-based biochips, in which the flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex units, such as micropumps, switches, mixers, and multiplexers, can be built. Although researchers have proposed significant work on the system-level synthesis of droplet-based biochips, which manipulate droplets on a two-dimensional array of electrodes, no research on system-level synthesis of flow-based biochips has been reported so far. The focus has been on application modeling and component-level simulation. Therefore, for the first time to our knowledge, we propose a system-level modeling and synthesis approach for flow-based biochips. We have developed a topology graph-based model of the biochip architecture, and we have used a sequencing graph to model the biochemical applications. We consider that the architecture of the biochip is given, and we are interested to synthesize an implementation, consisting of the binding of operations in the application to the functional units of the architecture, the scheduling of operations and the routing and scheduling of the fluid flows, such that the application completion time is minimized. We propose a List Scheduling-based heuristic for solving this problem. The proposed heuristic has been evaluated using two real-life case studies and a set of four synthetic benchmarks.

Architectural synthesis of flow-based microfluidic large-scale integration biochips

Microfluidic biochips are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis on-chip. In this paper we are interested in flow-based biochips, in which the flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex units, such as micropumps, switches, mixers, and multiplexers, can be built. The manufacturing technology, soft lithography, used for the flow-based biochips is advancing faster than Moores law, resulting in increased architectural complexity. However, the designers are still using full-custom and bottom-up, manual techniques in order to design and implement these chips. As the chips become larger and the applications become more complex, the manual methodologies will not scale, becoming highly inadequate. Therefore, for the first time to our knowledge,we propose a top-down architectural synthesis methodology for the flow-based biochips. Starting from a given biochemical application and a microfluidic component library, we are interested in synthesizing a biochip architecture, i.e., performing component allocation from the library based on the biochemical application, generating the biochip schematic (netlist) and then performing physical synthesis (deciding the placement of the microfluidic components on the chip and performing routing of the microfluidic channels), such that the application completion time is minimized. We evaluate our proposed approach by synthesizing architectures for real-life applications as well as synthetic benchmarks.

Control synthesis for the flow-based microfluidic large-scale integration biochips

In this paper we are interested in flow-based microfluidic biochips, which are able to integrate the necessary functions for biochemical analysis on-chip. In these chips, the flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex units, such as micropumps, mixers, and multiplexers, can be built. In this paper we propose, for the first time to our knowledge, a top-down control synthesis framework for the flow-based biochips. Starting from a given biochemical application and a biochip architecture, we synthesize the control logic that is used by the biochip controller to automatically execute the biochemical application. We also propose a control pin count minimization scheme aimed at efficiently utilizing chip area, reducing macro-assembly around the chip and enhancing chip scalability. We have evaluated our approach using both real-life applications and synthetic benchmarks.

A network-flow based valve-switching aware binding algorithm for flow-based microfluidic biochips

Designs of flow-based microfluidic biochips are receiving much attention recently because they replace conventional biological automation paradigm and are able to integrate different biochemical analysis functions on a chip. However, as the design complexity increases, a flow-based microfluidic biochip needs more chip-integrated micro-valves, i.e., the basic unit of fluid-handling functionality, to manipulate the fluid flow for biochemical applications. Moreover, frequent switching of micro-valves results in decreased reliability. To minimize the valve-switching activities, we develop a network-flow based resource binding algorithm based on breadth-first search (BFS) and minimum cost maximum flow (MCMF) in architectural-level synthesis. The experimental results show that our methodology not only makes significant reduction of valve-switching activities but also diminishes the application completion time for both real-life applications and a set of synthetic benchmarks.

Scheduling and Fluid Routing for Flow-Based Microfluidic Laboratories-on-a-Chip

Microfluidic laboratories-on-a-chip (LoCs) are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis on-chip. There are several types of LoCs, each having its advantages and limitations. In this paper we are interested in flow-based LoCs, in which a continuous flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex units, such as micropumps, switches, mixers, and multiplexers, can be built. We consider that the architecture of the LoC is given, and we are interested in synthesizing an implementation, consisting of the binding of operations in the application to the functional units of the architecture, the scheduling of operations and the routing and scheduling of the fluid flows, such that the application completion time is minimized. To solve this problem, we propose a list scheduling-based application mapping (LSAM) framework and evaluate it by using real-life as well as synthetic benchmarks. When biochemical applications contain fluids that may adsorb on the substrate on which they are transported, the solution is to use rinsing operations for contamination avoidance. Hence, we also propose a rinsing heuristic, which has been integrated in the LSAM framework.

Design Methodology for Flow-Based Microfluidic Biochips

This chapter presents an overview of the mVLSI biochips design and programming methodologies, highlighting the main tasks that have to be performed. The purpose is to explain how the methods presented in this book are used within a methodology and to define and illustrate the main tasks. We highlight the difference between “physical design and testing,” which is concerned with designing a biochip, and “programming and control,” which considers that the biochip is given, and addresses the mapping of a biochemical application on the given architecture. Programming and control is covered by Part II, whereas physical design and testing are covered in Part III. This chapter also presents the related work for the design tasks introduced.

On-Chip Control Synthesis

One of the disadvantages of current biochips is that they require expensive, bulky and power hungry off-chip control. The situation is thus that a lab-on-a-chip (a biochip) is still confined to the environment of a conventional laboratory and is in reality a chip-in-a-lab. Recent technological advancements have opened possibilities to move the off-chip control logic on-chip. This is done by combining normally closed valves such that they create logical gates which can be used to create logic control circuits. Using these circuits, researchers have been able to create biochips requiring only one vacuum power source. The design process and applied design methodologies are currently manual, which is highly inefficient and error-prone. This chapter proposes automated methods for the synthesis of on-chip control logic: an approach to generate general-purpose control logic; application of multiple-level control synthesis algorithms and library mapping for circuit design; utilization of the simulated annealing metaheuristic for the placement part of the physical synthesis; a modified three-dimensional version of Lee’s path finding algorithm for routing.

Compiling High-Level Languages

In this chapter, we will present a method for the application model synthesis problem, i.e., generate the application graph for a biochemical assay written in the Aqua high-level protocol language presented in Chap. 4. The method has two steps. In the first step, we build a parser that will generate a “parse tree” from Aqua, which is an internal compiler representation. This parse tree is then traversed in a second step in order to generate the application graph model. During application model generation, we address the so-called “mixing problem,” i.e., how to generate a mixing tree to perform an arbitrary mixing ratio, as specified in the high-level language, considering mixing operations with a ratio of one-to-one. The chapter presents the high-level language grammar, the algorithms for the two steps, and several examples of Aqua code and the resulting conversion to the application graph model.

Control Synthesis and Pin-Count Minimization

In this chapter, we propose a top-down control synthesis framework for implementing the biochemical applications on the flow-based biochips. Our algorithm generates the control logic needed to execute the application and uses a Tabu Search-based optimization in order to minimize the control pin count. The minimization is targeted at efficiently utilizing the chip area and reducing the macro-assembly around the chip. The framework has been evaluated using real-life applications as well as a set of synthetic benchmarks. The proposed approach is expected to facilitate programmability and automation, and enhance scalability of the flow-based biochips.

Application Mapping and Simulation

In this chapter we address the problem of mapping a biochemical application modeled as a sequencing graph to a given biochip architecture. The mapping consists of the binding, scheduling, and routing tasks. We first propose a constraint programming (CP) synthesis approach that optimally synthesizes a biochemical application onto the specified biochip architecture with the application completion time minimization as the target objective. The synthesis process involves performing binding and scheduling of operations while satisfying the dependency and resource constraints. Our CP approach ignores fluid routing. We also propose a computationally efficient heuristic approach that also takes into account fluidic routing (contention aware edge scheduling) together with the operation mapping. Real-life case studies and a set of synthetic benchmarks have been synthesized on different architectures for validating the proposed approach. To aid the development and testing during the application development phase, we have also developed a simulator that shows how a given mapped biochemical application is executed on a target biochip architecture. The proposed approaches are expected to reduce human effort, enabling designers to take early design decisions by being able to evaluate their proposed architecture, minimizing the design cycle time and also facilitating programmability and automation.