Warren Marwood
Defence Science and Technology Organisation
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Publication
Featured researches published by Warren Marwood.
Microelectronics Journal | 2002
Said F. Al-Sarawi; Petar B. Atanackovic; Warren Marwood; Bradley A. Clare; Kerry A. Corbett; Kenneth J. Grant; Jesper Munch
Abstract Differential architectures for both first order error diffusion and first order sigma–delta modulators are presented in this paper. Techniques required to transform single-ended architectures to differential architectures are discussed which are suitable for implementation in both p–i–n and n–i–n SEED technologies. Descriptions of common SEED circuit modules, together with SPICE behavioural simulations are also presented. A feature of the architectures presented is that they can be fully integrated into a single substrate using MEMS technology. This can be done by incorporating integrated optical waveguides together with MMIC technology. The goal of this work is a fully integrated differential optical oversampling modulator with extremely high resolution and linearity.
SPIE's International Symposium on Smart Materials, Nano-, and Micro- Smart Systems | 2002
Tony Sarros; Said F. Al-Sarawi; Kerry A. Corbett; Kenneth J. Grant; Bradley A. Clare; Warren Marwood
Oversampled analog-to-digital conversion architectures provide a trade-off between sampling speed for improved amplitude resolution without the need for complex analog circuits. One form of oversampled data conversion techniques is sigma-delta (ΣΔ) modulation, which takes advantage of high sampling rates. In this paper, a performance evaluation on ΣΔ modulators based on measured data of Self Electro-optic Effect Devices are presented and discussed. The data are used in evaluating the performance of the A/D converter using MATLAB simulations.
international conference on knowledge based and intelligent information and engineering systems | 1999
K.N. To; Cheng-Chew Lim; Andrew Beaumont-Smith; Michael J. Liebelt; Warren Marwood
Support vector training requires the evaluation of a quadratic programming (QP) problem which is computationally intensive. In addition, the size of the QP is dependent on the number of training samples and may exceed the memory size. This paper presents a fast parallel implementation of the SVM on an array processor which is optimised for matrix operations. A decomposition algorithm is used to break large scale support vector problems into a fixed size block for efficient processing in the array.
usnc ursi radio science meeting | 2015
Hedley J. Hansen; Andrew S. Kulessa; Manik Attygalle; Warren Marwood; G. Knight; Brian Jones; Jorg M. Hacker
The reliable prediction of RF system performance depends on the morphology of the tropospheric environment. For instance, the performance of systems, operating at frequencies above 10 GHz, are particularly affected by hydrometeor scattering and molecular resonance processes occurring in the moist and unstable sea surface air. In addition, the turbulent transport processes occurring near the sea surface have a major influence in predicting communication and radar system performance. Evaporation ducts arise from such processes near the sea surface and therefore their characterization require humidity gradient measurements which are difficult to obtain at low heights. Successful implementations of Parabolic Equation Modelling (PEM) for predicting propagation rely on knowing the refractive index at very low heights.
Photonics: Design, Technology, and Packaging | 2004
Bradley A. Clare; Kerry A. Corbett; Kenneth J. Grant; Angus Massie; Jesper Munch; Warren Marwood
In this article photonic implementations of two oversampled analog-to-digital converter architectures are discussed. The first, and simplest design is that of pulse-code-modulation. Simulations and an experiment are developed employing a Multiple-Quantum-Well p-i-n diode comparator. Agreement between simulation and experiment is demonstrated and the design is subsequently extended to a higher performance first order unipolar sigma-delta architecture. Results of the signal-to-noise ratio as a function of input amplitude are presented for an oversampling ratio of 100.
Microelectronics : design, technology, and packaging. Conference | 2004
Tony Sarros; Kerry A. Corbett; Said F. Al-Sarawi; Bradley A. Clare; Kenneth J. Grant; Warren Marwood
As the demand for analog-to-digital (A/D) conversion with greater bandwidths increase, it is necessary to look at other alternatives to electronics for integrated circuit design. One such approach to utilize is a combination of optics and electronics, or opto-electronics, at all levels of the system hierarchy. A device that has these properties is the Self Electro-optic Effect Device (SEED), and combining this with oversampling techniques for data conversion can meet the demands for direct digitization of radio frequency (RF) signals. One form of A/D oversampling conversion method is Sigma-Delta modulation. A key element of this technique is the subtractor and in this paper we will discuss the implementation of a differential subtractor using SEEDs as part of a Sigma-Delta Modulator. This paper will detail simulation results based on experimental data to predict the behavior of two types of differential subtractors, one of which will be compared with experimental results.
Proceedings of SPIE, the International Society for Optical Engineering | 2001
Said F. Al-Sarawi; Warren Marwood; Petar B. Atanackovic
Differential architectures for both first order error diffusion and also first order sigm-delta modulators are presented in this paper. Techniques required to transform single-ended architectures to differential architectures are discussed which are suitable for implementation in both PIN and NIN SEED technologies. Descriptions of common SEED circuit modules, together with SPICE behavioural simulations are also presented. A feature of the architectures presented is that they can be fully integrated into a single substrate using MEMS technologies. This can be done by incorporating integrated optical waveguides together with MMIC technology. The goal of this work is a fully integrated differential optical oversampling modulator with extremely high resolution and linearity.
conference on advanced signal processing algorithms architectures and implemenations | 1999
Andrew Beaumont-Smith; Cheng-Chew Lim; John Tsimbinos; Warren Marwood; Neil Burgess
A cascadable 10GOPS transversal filter chip has been designed and fabricated and can operate in 32-tap symmetric, 32-tap anti- symmetric or 16-tap non-symmetric modes. It has programmable tap weights and uses 16-bit signed arithmetic with radix-16 multipliers and 4 - 2 compressors to reduce the transistor count. The chip was fabricated in a 0.35 micrometer CMOS process, measures 3.1 X 4.4 mm and contains 310,000 transistors. The chip is pipelined and has a maximum clock rate of 200 MHz (200 MSa/s throughput). An error table compensator system using a lookup table has been built using the transversal filter programmed as a wideband differentiator with some additional on chip circuits including delays and an adder. An external memory stores the error table. The error table technique is capable of providing between 7 to 15 dB improvement in the dynamic range of typical 100 Ms/s A/D converters. An application to pulse shaping of high chip rate spread spectrum signals is also discussed.
Design, characterization, and packaging for MEMS and microelectronics. Conference | 1999
Said F. Al-Sarawi; Neil Burgess; Warren Marwood; Petar B. Atanackovic
This paper describes the design of very high speed optoelectronic analog digital converter based on a digital division algorithm called SRT division using n-i(MQW)-n self electro-optic effect device (SEED) technology. The proposed structure is a pipeline ADC. The SRT algorithm was chosen because it provides a redundancy per stage of the pipeline. The amount of redundancy is dependent on the radix of the SRT algorithm and the number set chosen. The relation between the SRT radix, number set and the division full range is given in this paper. Also a macro-model for the n- i(MQW)-n device was developed and used to simulate all the circuitry and algorithmic operations needed for the ADC. These included analog addition, analog subtraction and integer multiplication. Based on the developed macro-model and n-i(MQW)-n SEED circuit modules a basic unit of the algorithm ADC was designed.
Computer Standards & Interfaces | 1999
Andrew Beaumont-Smith; Michael J. Liebelt; Cheng-Chew Lim; K.N. To; Warren Marwood