Wei-Jen Huang

Capacitor-free low dropout regulators using nested Miller compensation with active resistor and 1-bit programmable capacitor array

A capacitor-free CMOS low dropout regulator (LDR) using the nested Miller compensation with an active resistor (NMCAR) is presented. It can efficiently control the damping factor and reduce the required Miller compensation capacitance. It can also resolve the trade-off between dc loop gain and damping factor, which existed in the LDR using the nested Miller compensation. To reduce the total Miller compensation capacitances further, a capacitor-free CMOS LDR using both the NMCAR and a 1-bit programmable capacitor array is presented. For this LDR, the total on-chip compensation capacitance is reduced 40% without influencing its stability. Furthermore, it also enhances the recovery time, compared with the LDR using the NMCAR technique. Two proposed LDRs with bandgap voltage references have been fabricated in a 0.35mum CMOS process. They can operate with and without output capacitors.

A Fast-Recovery Low Dropout Linear Regulator for Any-Type Output Capacitors

A 1.8-V, 150-mA fast settling low dropout linear regulator (LDO) with single Miller compensation capacitor is presented. By utilizing the digital-controlled dynamic bias circuit to track the output current, the proposed LDO provides fast settling time for the output capacitors with low and high equivalent series resistance (ESR). The proposed LDO has been fabricated in a 0.35-mum 2P4M CMOS technology, and the active chip area is 480mum times 675mum. The measurement results show the settling time of 4mus can be achieved with 0.5% error for full load-current changes for both multilayer ceramic and electrolytic 1-muF output capacitors. Furthermore, the line and load regulations are 0.127%N and 40ppm/mA, respectively. The dropout voltage is 190mV in 150mA output current. The measured quiescent current is 45muA in 5V supply voltage without output current

A Capacitor-free CMOS Low Dropout Regulator with Slew Rate Enhancement

A CMOS low dropout (LDO) regulator is presented to be stable for any load capacitor. A modified AC boosting technique is adapted in this regulator. Moreover, a slew rate enhancement circuit is presented to increase the slew rate and decrease the output voltage dips when a large load current is switched from 0 to 150mA. A 3.3V, 150mA, LDO regulator has been fabricated in a 0.35mum process

A Rail-to-Rail Class-B Buffer With DC Level-Shifting Current Mirror and Distributed Miller Compensation for LCD Column Drivers

A rail-to-rail class-B buffer with a dc level-shifting current mirror and the proposed distributed Miller compensation is presented for liquid crystal display (LCD) column drivers. By using a dc level-shifting current mirror, the rail-to-rail input stage directly turns on/off the rail-to-rail push-pull output stage without extra comparators. It results in a low-power rail-to-rail class-B buffer. By utilizing the distributed Miller compensation, this class-B buffer achieves the high stability and the fast transient response over a wide-range capacitance load. The class-B buffer is fabricated in a 0.35 μm CMOS process, and its die area is 122 μm × 54 μm. From the experimental results, the measured quiescent current is 3 μA and the settling time for a rail-to-rail full swing to settle within 0.2% of the final voltage for both rising and falling edges is 1.78 μs under a load capacitance of 1200 pF with a power supply of 3.3 V.

A Fast Settling Low Dropout Linear Regulator with Single Miller Compensation Capacitor

A 1.8-V, 150-mA fast settling low dropout linear regulator (LDO) with single Miller compensation capacitor is presented. By utilizing the digital-controlled dynamic bias circuit to track the output current, the proposed LDO provides fast settling time for the output capacitors with low and high equivalent series resistance (ESR). The proposed LDO has been fabricated in a 0.35-um 2P4M CMOS technology, and the active chip area is 480 um times675 um. The measurement results show the settling time of 4us can be achieved with 0.5% error for full load-current changes for both multilayer ceramic and electrolytic 1-uF output capacitors. Furthermore, the line and load regulations are 0.127%N and 40ppm/mA, respectively. The dropout voltage is 190mV in 150mA output current. The measured quiescent current is 45uA in 5V supply voltage without output current

Ultrasonic Power/Data Telemetry and Neural Stimulator With OOK-PM Signaling

An ultrasonic power/data telemetry and a neural stimulator are presented. An on-off keying with pulse modulation is adopted for ultrasonic signal transmission. The ultrasonic power is used to charge a battery. The ultrasonic data are used for neural stimulation, and an animal study is also demonstrated. The range of the stimulation current is 0-640 μA. The frequency of the stimulation current pulse is from 60 to 265 Hz. This ultrasonic power/data telemetry with a neural stimulator is fabricated in a 0.35- μm CMOS technology. It occupies the area of 4.4 mm2. The total power dissipation is 2 mW with a stimulation current of 140 μA and a stimulation frequency of 265 Hz.

A sub-1v low-dropout regulator with an on-chip voltage reference

A sub-1V 50 mA low-dropout regulator (LDR) with an on-chip voltage reference is presented. This LDR utilizes the push-pull output stage to reduce the size of the power PMOS transistor. The proposed LDR with the on-chip voltage reference has been fabricated in 0.18 mum CMOS process, and its active area is 0.148 mm2. Experimental results demonstrate that the voltage reference and the LDR work for the supply voltage of 0.6 V~1.2V. For the proposed LDR under a supply of 0.6 V, the measured settling time, voltage dip, and quiescent current are less than 2mus, 50 mV, and 16.6 muA, respectively.

Ultrasonic telemetry and neural stimulator with FSK-PWM signaling

An ultrasonic telemetry and a neural stimulator are presented. The wireless charging, data transmission and neural stimulation are demonstrated in this work. A frequency-shift keying with pulse-width modulation is adopted for wireless charging and data transmission. The stimulator provides an output current of 0μA~900μA. The frequency of the current pulse is from 60Hz to 320Hz. This ultrasonic telemetry with a neural stimulator is fabricated in a 0.35μm CMOS technology. It occupies the area of 4.84 mm2. The total power dissipation is 2.1mW.

A Dual-Phase Digital PWM Controller for DC-DC Switching Converters with Current Balancing

A dual-phase digital PWM controller is presented for DC-DC switching converters. This controller not only regulates the output voltage of a DC-DC converter, but also provides current balancing for the dual-phase power converter. By using voltage-current reaction current balancing, the system complexity is reduced. The chip has been fabricated in 0.35mum CMOS process and the active area is 1.996mm2. It consumed 40mW from a 3.3V supply

A wireless power telemetry with self-calibrated resonant frequency

A wireless power telemetry with self-calibrated resonant frequency is presented. The proposed calibration scheme adjusts the resonant frequency of inductively secondary coil to match the incident frequency of inductively primary coil. To adjust the resonant frequency of the secondary coil, the received power efficiency is improved. By experimented results, the overall power efficiency with frequency calibration is improved by a factor of 33%, compared with that one without frequency calibration. This wireless power telemetry has been fabricated in a standard 0.35µm CMOS process, and the chip area is 1.536mm2 including I/O pads.