Wenshan Zhao

Analogue VLSI implementations of wavelet transform based on switched-current technology

Hardware implementation is an optimum approach to the real-time application of wavelet transforms. In this paper, a novel method of implementing wavelet transform using switched-current (SI) technology is presented. Analog VLSI implementation procedure mainly involves the construction of a bank of filters whose impulse responses are the basic wavelet function and its dilations. SI circuits are well suited for this application since the dilation constant across different scales of the transform can be implemented and controlled by the clock frequency precisely. Therefore, the main focus just is on the SI circuit implementation of the basic wavelet function filter. The Marr wavelet is selected as an example with construction procedure and structure of SI circuits elaborated, in which the second-generation SI circuit is employed. Theoretical analysis and simulation results indicate that the proposed method is feasible.

Design of switched-current wavelet filters using signal flow graph

A novel scheme for the design of switched-current (SI) wavelet filter is proposed. The signal flow graph (SFG) inverse follow-the-leader feedback (IFLF) structure is employed in the filter design. The presented approach is well suited for the wavelet transform since the SFG method can realize arbitrary rational function derived from any approximation technique, with relatively low sensitivity magnitude. Also, due to the characteristics of SI circuits, the dilation constant across different scales of the wavelet transform can be easily realized by controlling the sampling frequency, which facilitates the practical circuit design. The Gaussian wavelet is used as an example in this paper to elaborate design details.

SFG realization of wavelet filter using switched-current circuits

A signal flow graph method for analogue implementation of wavelet transform using switched-current circuits is proposed in which the wavelet transform is synthesized by a bank of switched-current bandpass filters whose impulse responses are the mother wavelet and its dilations. To facilitate the implementation of arbitrary wavelet function, the proposed approach employs the signal flow graph methodology to design the wavelet filter. The first derivative of Gaussian wavelet is used as an example in this paper to illustrate design details. Simulation results show the feasibility of the proposed method.

A fully-programmable analog VLSI for Gaussian function generator using switched-current circuit

Gaussian functions are extensively used in the field of wavelet transform and pattern recognition. In this paper, a fully-programmable analog circuit for Gaussian function generator using switched-current (SI) technology is proposed. SI circuits are well suited for this application since the programmability can be implemented and controlled by the clock frequency and the transconductance ratios of SI filters precisely and easily. On the basis of central limit theorem, we synthesize the Gaussian function with the cascade of several low-pass filters, implemented by SI circuits. Theoretical analysis and simulation results show that the proposed method is feasible.

Design of high-frequency Gm-C wavelet filters

A high–frequency wavelet filter which employs Gm–C blocks based on leap–frog (LF) multiple–loop feedback (MLF) structure is presented. The proposed method is well suitable for high–quality high–frequency operation since the Gm–C based filter can achieve high frequency, whilst LF MLF configuration has the characteristics of lower magnitude sensitivity and capability of realizing arbitrary rational functions. The Marr wavelet is selected as an example in this paper, and the design for a 100MHz frequency operation is elaborated. The wavelet filter is simulated using TSMC 1.8V 0.18μm CMOS technology. Simulation results indicate that the proposed method is feasible for high frequency operation with relatively low power consumption.

A multiple loop feedback Gm-C bandpass filter for wavelet transform implementation

A general method for analogue implementation of high-frequency wavelet transform is proposed in which the wavelet transform is synthesized by a bank of Gm-C bandpass filters whose impulse responses are the mother wavelet and its dilations. The proposed approach employs the inverse follow-the-leader-feedback multiple loop feedback structure for filter design to lower the magnitude sensitivity and facilitate the arbitrary rational function realization. The Marr wavelet is used as an example in this paper to illustrate design details. The wavelet filter is simulated using TSMC 1.8V 0.18µm CMOS technology. Simulation results show performance values obtained.

Current-mode high-frequency wavelet filter based on leap-frog multiple-loop feedback structure

A method is proposed to realize high-frequency wavelet transform in analogue filter by employing Gm-C circuits and current-mode leap-frog multiple loop feedback structure in this paper. Also, to enhance the performance, the fully differential Nauta transconductor is utilized as the Gm cell in the design. The Marr wavelet is used as an example, with the design procedure illustrated. Using standard TSMC 0.18μm CMOS process, simulation results show that the center frequency of the Marr wavelet filter ranges from 63MHz to 142MHz by tuning supply voltage. The total power consumption is 69mW at 100MHz.

Current-mode Gm-C bandpass filter for wavelet transform implementation

This paper presents a method of designing wavelet filters for high-frequency real-time applications, in which the Gm-C technique and current-mode follow-the-leader multiple loop feedback structure are employed. The Marr wavelet is utilized as an example to elaborate the design procedure. Using TSMC 0.18µm CMOS process, the center frequency of the Marr wavelet filter can be tuned from 61.1MHz to 127MHz. The total power consumption at 100MHz is 60mW. Simulation results indicate that the proposed approach is feasible for high-quality high-frequency operation.

A new SoC video ghost canceller

A video ghost canceller, which reduces the effect of multi-path signal echoes (ghosts), is described in this paper. An adaptive LMS algorithm was used to improve the received image quality of PAL or NTSC broadcasts. The internal 576-tap digital filter, which is comprised of a 144-tap FIR and a 430-tap IIR filter, cancels ghosts occurring from −6.15µS before to +41.6µS after the main signal. In order to reduce the chip area occupied by the filter, an algorithm that combines the error threshold and the error accumulation methods is applied for reducing the coefficients word-length. Also, a tap-decimated equalizer is proposed, which can greatly reduce the number of the multipliers in the adaptive filter. The system on chip (SoC) device performs all the functions required for ghost cancellation, eliminating the need for external DSP controllers, memory, sync detection, D/A converters, A/D converters, and user programming. From chip tests, the canceller can remove the ghost whose power is lower than −6dB compared to that of the main signal and make ghost residue down to −40 dB. When operating at a rate of 14.318 MHz (4Fsc), it dissipates 1.3W from a 3.3V power supply.