Wilfrido Calleja

High-quality spin-on glass-based oxide as a matrix for embedding HfO2 nanoparticles for metal-oxide-semiconductor capacitors

By using a low cost, simple, and reproducible spin-coating method, thin films of SOG (spin-on-glass)-based oxides with electrical characteristics resembling those of a dry thermal oxide have been obtained. The superior electrical characteristics of Metal-Oxide-Semiconductor (MOS) capacitors based on SOG-oxides come from both (1) reducing the organic content of the SOG solutions after dilution with deionized water and (2) passivation of the silicon surface by a thin chemical oxide. Fourier transform infrared spectroscopy analysis shows that the organic content in H2O-diluted SOG-oxides is reduced compared to undiluted SOG after N2 annealing. In addition, by chemically embedding HfO2 nanoparticles (np-HfO2) to these SOG-based oxides, an effective increase in the accumulation capacitance of MOS capacitors is observed and this is related to the increase in the final dielectric constant of the resulting oxide after annealing so that potential use of SOG as a glass matrix for embedding HfO2 nanoparticles and produce higher-k oxide materials is demonstrated.

Physical and electrical characteristics of atomic-layer deposition-HfO2 films deposited on Si substrates having different silanol Si-OH densities

In this work, ultrathin HfO2 films, less than 6 nm in thickness, are deposited by atomic-layer deposition (ALD) on Si substrates that have a variable density of silanol (Si-OH) chemical bonds after oxidizing the Si surface using hot H2O2. Given the surface chemistry needed for proper ALD growth of HfO2, OH-last surfaces are needed in order to react with the Hf-based precursor during half-cycle of this reaction. The later is important for proper nucleation and uniform growth of ultrathin HfO2 by ALD. Depending on the immersion time of an initially HF-last Si surface in hot H2O2, ultrathin and nonstoichiometric chemical oxides SiOx are formed presenting a variable density of Si-OH bonds which are measured after Fourier-transform infra red spectroscopy. Following SiOx formation, HfO2 is directly deposited on these surfaces by ALD using water (H2O) and tetrakis-dimethylamino-hafnium as precursors. Metal–insulator–semiconductor (MIS) capacitors are then formed using both HfO2/Si and HfO2/SiOx/Si stacked structures and their electrical characteristics are evaluated. It is found that a variable density of Si-OH chemical bonds have an impact on the physical and electrical characteristics of these MIS structures by reducing their atomic surface roughness (Rrms) and gate leakage current density (Jg), and at the same time, increasing their flat band voltage (Vfb) for the same immersion times in H2O2. Obtaining the lowest Rrms, Jg, and Vfb are possible by using intermediate H2O2 immersion times between 4 and 8 min, which is also directly related to an intermediate Si-OH bond density.In this work, ultrathin HfO2 films, less than 6 nm in thickness, are deposited by atomic-layer deposition (ALD) on Si substrates that have a variable density of silanol (Si-OH) chemical bonds after oxidizing the Si surface using hot H2O2. Given the surface chemistry needed for proper ALD growth of HfO2, OH-last surfaces are needed in order to react with the Hf-based precursor during half-cycle of this reaction. The later is important for proper nucleation and uniform growth of ultrathin HfO2 by ALD. Depending on the immersion time of an initially HF-last Si surface in hot H2O2, ultrathin and nonstoichiometric chemical oxides SiOx are formed presenting a variable density of Si-OH bonds which are measured after Fourier-transform infra red spectroscopy. Following SiOx formation, HfO2 is directly deposited on these surfaces by ALD using water (H2O) and tetrakis-dimethylamino-hafnium as precursors. Metal–insulator–semiconductor (MIS) capacitors are then formed using both HfO2/Si and HfO2/SiOx/Si stacked struct...

Degradation and Breakdown of W–La2O3 Stack after Annealing in N2

We report the effect of relatively high-voltage stressing (under substrate injection) on the stress-induced leakage current (SILC) and breakdown of W–La2O3 stacked structures. It is shown that the gate area of the metal–insulator–semiconductor (MIS) devices under evaluation influences their final degradation characteristics after stress. Once the samples reach breakdown, their post-breakdown current–voltage (I–V) characteristics suggest that leakage spots are highly localized and are caused by the accumulation of defects.

Hermetic capacitive pressure sensors for biomedical applications

Purpose This paper aims to purpose the new design and fabrication scheme of Touch Mode Capacitive Pressure Sensor (TMCPS), which can be used in a wireless integrated resistor, inductor and capacitor circuit for monitoring pressure in biomedical applications. Design/methodology/approach This study focuses on the design, simulation and fabrication of dynamic capacitors, based on surface micromachining using polysilicon or aluminum films as the top electrode, both structural materials are capped with a 1.5 μm-thick polyimide film. Findings The design of microstructures using a composite model fits perfectly the preset mechanical behavior. After the full fabrication, the dynamic capacitors show complete mechanical flexibility and stability. Originality/value The novelty of the method presented in this study includes two important aspects: first, the capacitors are designed as a planar cavity within a rigid frame, where two walls contain channels which allow for the etching of the sacrificial material. Second, the electromechanical structures are designed using a composite model that includes a polyimide film capping for a precise pressure sensing, which also protects the internal cavity and, at the same time, provides full biocompatibility.

Optical fiber packaging for MEMS interfacing

An investigation study concerning positioning, alignment, bonding and packaging of optical fibers for interfacing with optical MEMS devices is being reviewed in this paper. The study includes a review of techniques and critical issues for optical fiber positioning, alignment, bonding, optical improvements, and coupling and interfacing through micro-lenses and waveguides. Also, we present a packaging design structure for hermetic sealing of optical MEMS devices requiring interfacing through optical fibers which considers aspects such as processes, assemble schemes and bonding techniques for Optical Fibers, which are briefly reviewed in this work. This packaging design considers the following conditions: hermeticity of the MEMS devices, optical fiber and MEMS die alignment and positioning, assembly process, and Simachined fixturing design for final assembly and positioning.

Evaluation of interface-states density for MOSFETs fabricated on high-index (114) silicon surfaces

Metal-oxide-semiconductor field-effect transistor (MOSFET) devices were fabricated on high-index silicon (114) surfaces and their threshold voltage (Vth) and interface-states density (Dit) parameters were both evaluated for the first time. Even though MOSFET devices aligned at 0°, 30°, 60° and 90° off the equivalent [110] direction present two closely related average Vth values, Dit evaluation shows that for all channel orientations (0°, 30°, 60° and 90°), this high-index silicon (114) surface develops a high-quality interface with SiO₂ in which few electrons are trapped so that Dit as low as 10¹⁰ cm^-2eV^-1 can be obtained.

Performance of a MOHOS-type memory using np-HfO 2 and variable tunneling oxide thickness

We use HfO2 nanoparticles (np-HfO2 embedded in a spin-on glass SOG oxide matrix) as a charge trapping layer CTL in metal/oxide/high-k/oxide/silicon (MOHOS)-memories. This CTL is then deposited on ultra-thin layers of chemical oxide SiOx ≤2nm. Depending on the SiOx thickness, a trade-off in writing/erasing and data retention time characteristics is obtained.

Progressive-degradation and breakdown of W-La 2 O 3 MOS structures after constant voltage stress

In this paper, we report the progressive electrical degradation and consequent breakdown (both soft and hard-breakdown regimes) of thin W-La2O3 stacked films deposited on silicon substrates and their influence on the electrical characteristics of metal-oxide-semiconductor (MOS) devices. Initial electrical degradation of the MOS devices results in an increase of the gate oxide leakage current (mostly known as Stress-Induced Leakage-Current, SILC), with the devices practical effect being a monotonous shift in threshold voltage (¿Vth) after constant voltage stressing. Following the initial degradation of the gate oxide, both soft and hard-breakdown modes are detected and their influence on the electrical characteristics of the MOS devices are also obtained and compared.