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Dive into the research topics where William H. Lytle is active.

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Featured researches published by William H. Lytle.


IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B | 1996

Application of a CFD tool in designing a fountain plating cell for uniform bump plating of semiconductor wafers

Tien-Yu Tom Lee; William H. Lytle; Ben Hileman

Fountain plating is a widely used method for electroplating bumps for flip chip and tape automated bonding (TAB) applications. Ideally, the plating process should produce metal bumps of uniform height (both within the bump and across the wafer) and flat-end surface in order to make good bonding to a device package. However, varying degrees of deposit uniformity have always been an issue in electroplating due to the current density distribution on the wafer, the electric field between the anode plate and the wafer, and the plating solution flow motion. The problem of nonuniform bump plating is especially serious in indium. Plated indium bumps tend to be much thicker on the sides corresponding to the direction of flow, creating nonuniform geometry and possible electric shorts. An improvement on fountain style plating cells has been developed for better control of deposit uniformity during bump plating operations. By applying a computational fluid dynamics (CFD) tool to analyze the flow motion inside the fountain plating cell, a favorable plating solution flow path, is created so that uniform flow will reach the wafer surface. Experiments are performed to verify the CFD model. Indium bumps are plated to a 10-cm diameter wafer in the fountain cell, Photographic results illustrate that when the anode plate is too close to the solution inlet plane, over-plating occurs, resulting in tear drop or comet shaped bumps. However, with a proper distance between the anode and the inlet plane, uniform bumps are created.


Archive | 1994

Adjustable plating cell for uniform bump plating of semiconductor wafers

William H. Lytle; Tien-Yu T. Lee; Bennett L. Hileman


Archive | 1996

Method of forming contact pads for wafer level testing and burn-in of semiconductor dice

William M. Beckenbaugh; William H. Lytle; Bernard Berman


Archive | 1995

Method of forming an electrical interconnect

Jong-Kai Lin; William H. Lytle; Ravichandran Subrahmanyan


Archive | 1996

Bonding structure for an electronic device

Lih-Tyng Hwang; William H. Lytle


Archive | 1994

Interconnect system for a semiconductor chip and a substrate

Ravichandran Subrahmanyan; Ravinder K. Sharma; William H. Lytle; Barry C. Johnson


Archive | 1987

Method of chemically etching TiW and/or TiWN

William H. Lytle


Archive | 1995

Method of forming an electrically conductive polymer bump over an aluminum electrode

William H. Lytle; Treliant Fang; Jong-Kai Lin; Ravinder K. Sharma; Naresh C. Saha


Archive | 1989

Electroless plating of portions of semiconductor devices and the like

William H. Lytle; Dennis R. Olsen


Archive | 1990

Backside metallization scheme for semiconductor devices

Ravinder K. Sharma; William H. Lytle; Angela Rogona; Bennett L. Hileman

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