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William Michael Lye

PMC-Sierra

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Publication

Featured researches published by William Michael Lye.

Archive | 2007

Configurable Voltage Mode Transmitted Architecture With Common-Mode Adjustment And Novel Pre-Emphasis

Michael B. Venditti; William Michael Lye

Archive | 2007

Systems and methods for actively-peaked current-mode logic

John P. Plasterer; William Michael Lye; Matthew W. McAdam

Archive | 2005

Systems and methods for translation of signal levels across voltage domains

Sally Yeung; William Michael Lye

Archive | 2003

Joint equalization and timing acquisition for RZ signals

Claudio Gustavo Rey; William Michael Lye; Ognjen Katic; Terence K. W. Lau; Jatinder Chana

Archive | 2000

Process-insensitive controllable CMOS delay line

William Michael Lye

Archive | 2006

Compact CMOS ESD layout techniques with either fully segmented salicide ballasting (FSSB) in the source and/or drain regions

Graeme B. Boyd; William Michael Lye; Xun Cheng

Archive | 2015

Low-noise flexible frequency clock generation from two fixed-frequency references

Hormoz Djahanshahi; William Michael Lye

Archive | 2013

System and method for synchronizing local oscillators

William Michael Lye; Dragos Cartina

Archive | 2009

DSP-based diagnostics for monitoring a SerDes link

William D. Warner; Graeme B. Boyd; William Michael Lye

Archive | 2012

Interleaved digital to analog conversion

Tomas A. Dusatko; William Michael Lye

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Graeme B. Boyd

PMC-Sierra

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Xun Cheng

PMC-Sierra

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Anthony B. Candage

PMC-Sierra

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Claudio Gustavo Rey

PMC-Sierra

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Dragos Cartina

PMC-Sierra

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Hormoz Djahanshahi

PMC-Sierra

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Jatinder Chana

PMC-Sierra

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John B. Groe

PMC-Sierra

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John P. Plasterer

PMC-Sierra

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Matthew W. McAdam

PMC-Sierra

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