William R. Heller

Prediction of wiring space requirements for LSI

A stochastic model is developed for estimating wiring space requirements for one-dimensional layouts. This model uses as input the number of devices in the complex to be wired, the average length of a connection, and the average number of connections per device, to compute the probability of successfully wiring the devices as a function of the number of tracks provided. A heuristic approach is used to extend this model to the two-dimensional case, and tested against experimen-tal studies. Satisfactory agreement is found between a priori calculations of track requirements for the two-dimensional case against global wiring solutions for artificially generated problems, and for some layouts of actual logic complexes.

On finding Most Optimal Rectangular Package Plans

The layout problem requires a combination of space costs and communication costs to be minimized. The special problem of planar, rectangular spaces occurs, for example, in floor plans for electronic planar packages and for buildings. Here we describe a number of algorithms, embedded in an interactive system, that solve the layout problem efficiently when it is expressed in terms of the package planning algorithm. A hierarchical approach is used to contain computational growth.

The Planar Package Planner for System Designers

The Planar Package Planner is a design aid aimed at helping to form a package layout plan, given only the information available during project initiation to digital system logic and package designers. A hierarchical approach is adopted, and a clustering program makes possible use of the layout scheme for bottom-up as well as top-down design. The layout plan for an experimental microprocessor is worked out as an example of the method.

Package Wiring and Terminals

Digital circuits on semiconductor chips are the heart of the overwhelming majority of modern technology-based systems. Chips usually are housed in packages or carriers which are attached to a “planar” or printed-circuit board (PCB). However, there is a growing trend to attach bare chips directly to the PCB when size is critical. The circuits on these chips must be connected to their on-chip and off-chip circuits. Chips must be connected to each other through the carrier by terminals and “wires” on these carriers. In turn, the carrier packages need to connect to yet higher levels with their own terminals and wires, creating a packaging hierarchy.