Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where William R. Krenik is active.

Publication


Featured researches published by William R. Krenik.


design automation conference | 2005

Cognitive radio techniques for wide area networks

William R. Krenik; Anuj Batra

The cellular wireless market has begun the transition to data centric services including high speed Internet access, video, high quality audio, and gaming. Communications technology can meet the need for very high data link speeds, and can also improve network throughput, but dramatically more spectrum is needed to provide ubiquitous wireless data service. Cognitive radio is a new technology that allows spectrum to be dynamically shared between users. It offers the potential to dramatically change the way spectrum is used in systems and to substantially increase the amount of spectrum available for wireless communications. This paper introduces cognitive radio and explains the promise, possible operating modes, and benefits it may offer.


IEEE Transactions on Electron Devices | 2003

SOC CMOS technology for personal Internet products

Dennis Buss; Brian L. Evans; Jeff Bellay; William R. Krenik; Baher Haroun; Dirk Leipold; Ken Maggio; Jau-Yuann Yang; Ted Moise

Worldwide demand for Personal Internet Products is increasing rapidly, and will shape the directions of CMOS technology in the years ahead. Personal Internet Products are loosely defined in this paper as communication, computing and consumer products, which are enabled by the Internet: cell phones, PDAs, WLANs, Internet audio/video, ADSL, cable modems etc. Personal Internet Products are based on Digital Signal Processing (DSP) and analog functionality. They are made accessible to billions of people around the globe by intense focus on cost through SOC integration. In the Internet Age, Moores Law will continue to be a technology imperative for the semiconductor industry. But SOC integration will be an additional technology imperative that drives down the cost of Personal Internet Product to mass market levels. SOC integration for Personal Internet Products requires the integration of analog, power analog, RF and memory onto the digital baseband processor, which is fabricated in high density, high performance, low cost digital CMOS technology. This paper describes the challenges and some of the solutions to achieve this vision.


custom integrated circuits conference | 2004

Cellular handset integration -- SIP vs. SOC

William R. Krenik; Dennis Buss; Peter Rickert

Cellular handsets are rapidly evolving from voice-only products to highly featured designs featuring color displays, games, audio, video, cameras, Bluetooth, GPS, WLAN, highspeed wide-area data services, and other advanced features. This remarkable expansion in capability, in conjunction with ongoing customer demands for sleek, ergonomic, and reasonably priced handsets with good battery life, places considerable pressure on handset component providers to aggressively integrate the handset electronics. System-in-package (SIP) integration and system-on-chip (SOC) integration are two possible approaches. This paper investigates the tradeoffs between SIP and SOC integration for the integration of memories, analog, and RF electronics in the handset.


IEEE Journal of Solid-state Circuits | 2005

Cellular handset integration - SIP versus SOC

William R. Krenik; Dennis Buss; Peter Rickert

Cellular handsets are rapidly evolving from voice-only products to highly featured designs featuring color displays, games, audio, video, cameras, Bluetooth, GPS, WLAN, high-speed wide-area data services, and other advanced features. This remarkable expansion in capability, in conjunction with ongoing customer demands for sleek, ergonomic, and reasonably priced handsets with good battery life, places considerable pressure on handset component providers to aggressively integrate the handset electronics. System-in-Package (SIP) integration and System-on-Chip (SOC) integration are two possible approaches. This paper investigates the tradeoffs between SIP and SOC integration for the integration of memories, analog, and RF electronics in the handset.


IEEE Design & Test of Computers | 2006

Cell phone integration: SiP, SoC, and PoP

Peter Rickert; William R. Krenik

Engineers must make many cost-effective decisions during a products design cycle. One challenge is deciding on the best packaging for their products. This article presents trade-offs among system-in-package, system-on-chip, and package-on-package integration for mobile phone applications


international solid-state circuits conference | 1994

An analog front-end signal processor for a 64 Mb/s PRML hard-disk drive channel

Davy H. Choi; Richard C. Pierson; Fredrick W. Trafton; Benjamin Sheahan; Venugopal Gopinathan; Glenn Mayfield; Indumini Ranmuthu; Srinivasan Venkatraman; Vivek Pawar; Owen Lee; William H. Giolma; William R. Krenik; W. Abbott; K. Johnson

Synchronous channel designs, such as partial response maximum likelihood (PRML), are viable for high areal density on a hard-disk drive (HDD). Previously-published PRML channels include a 56 Mb/s channel design but without an on-chip programmable filter, synthesizer or servo demodulator. This 5V BiCMOS integrated circuit contains all the analog front-end functions necessary for a 64Mb/s HDD channel using a rate-8/9 code.<<ETX>>


international solid state circuits conference | 1994

An analog front-end signal processor for a 64 Mbits/s PRML hard-disk drive channel

Davy H. Choi; Richard C. Pierson; Fredrick W. Trafton; Benjamin Sheahan; Venugopal Gopinathan; Glenn Mayfield; Indumini Ranmuthu; Srinivasan Venkatraman; Vivek Pawar; Owen Lee; William H. Giolma; William R. Krenik; William L. Abbott; Kenneth E. Johnson

This BiCMOS IC contains all the analog front-end components necessary for the design of a 21-64 Mb/s HDD channel. Major functional blocks include an automatic gain control circuit having both analog and digital modes of operation, a programmable filter with 6-33 MHz bandwidth range, two phase-locked loops with 24-72 MHz center frequency ranges, a differential 6 bit flash A/D converter with 24-72 MHz sampling rates, and a write precompensator having 600 ps step size. >


Wireless Personal Communications | 2002

Wireless User Perspectives in the United States

William R. Krenik

The perspective of typical wireless service users in the United States is examined. Voice, data information, security, and location-based services and their expected evolution over the next few years is discussed. Handset design is considered with emphasis on handset evolution as data and location-based services emerge.


asia-pacific microwave conference | 2006

Fully-integrated CMOS RF transceivers

William R. Krenik; R. Bogdan Staszewski

The market for cellular wireless handsets demands very high levels of sophistication and also low component cost and power. In addition to wide-area network interfaces such as GPRS, EDGE, and WCDMA, wireless connectivity features such as GPS, Bluetooth, WLAN, and mobile digital TV are now becoming commonplace. This has driven the demand for many air interfaces to be supported in a single handset design. Conventional silicon integration, employing separate digital baseband, analog, and RF components for each air interface would result in far too many components for an efficient integration. As a result, CMOS SOC devices that integrate all of these functions into single-chip components have become increasingly popular. This paper explains the motivation and challenges of SOC integration in deep submicron CMOS. Examples of SOC devices are provided along with experimental results.


Educational Technology & Society | 2000

DSP & analog SOC integration in the Internet era

Dennis Buss; Amitava Chatterjee; Taylor R. Efland; Brian L. Evans; Harold D. Goodpaster; Baher Haroun; James R. Hellums; William R. Krenik; Alec J. Morton; H. Shichijo; Chin Yu Tsai; Thomas R. Vrotsos

In the PC era, microprocessors and memory were the semiconductor components that drove the PC industry. In the Internet era, DSP and analog functions will drive the Internet access industry. System-on-a-chip (SOC) integration will be the primary technology driver along with continuing Moores law. This paper discusses the device issues on the integration of analog baseband, small signal RF functions and power management function together with low cost, high density, deep submicron digital CMOS. The integration will require creative new analog and RF device design together with creative circuit techniques.

Collaboration


Dive into the William R. Krenik's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge