William T. Lynch

A study of the leakage mechanisms of silicided n+/p junctions

Leakage mechanisms for shallow, silicided, n+/p junctions have been investigated. This study consists of two parts: (a) the isolation of the processing steps that cause junction leakage, and (b) the study of the mechanism for a particular process that causes leakage. Reactive ion etching, improper junction, silicide formation procedures, ion mixing, and mechanical stress are found responsible for junction leakage, although through different mechanisms. Two mechanisms have been identified for junction leakage: (a) generation centers in the depletion region caused by deep levels from damage, or from impurities, and (b) Fowler–Nordheim tunneling caused by irregularities at the silicide/silicon interface at high reverse bias. Junction leakage can be avoided by carefully designing the details of silicide and junction formation and by carefully fine‐tuning the processing steps to prevent damage of the Si substrate after forming the junction. The best junctions are made by implanting As into CoSi2 and by driving...

A high-performance directly insertable self-aligned ultra-radiation-hard and enhanced isolation field-oxide technology for gigahertz Si-CMOS VLSI

A field-oxide structure for radiation-hard CMOS VLSI is described. It is a three-layer structure consisting of a thin thermal oxide, a doped polysilicon sheet deposited on the thin oxide, and a thick CVD oxide layer deposited on the polysilicon. The polysilicon sheet is maintained at the substrate potential by, e.g. using n-type poly-Si over the n-tub and p-type poly-Si over the p-tub or p-substrate and allowing contacts to be made through the thin oxide. The small effective electrical thickness of the thin oxide combined with the ground potential of the polysilicon enhances the radiation hardness and maintains good isolation even at radiation levels as high as 10/sup 8/ rads and above. This structure is self-aligned to the active regions and directly insertable into a submicrometer CMOS VLSI without any changes in the circuit design. The circuits made with this technology can operate at 2.5-3 GHz even after a total dose of 50-100 Mrad.<<ETX>>