William W. Dostalik

Dual damascene pattern liner

Method for etch-stop layer etching during damascene dielectric etching with low polymerization

POISON-FREE AND LOW ULK DAMAGE INTEGRATION SCHEME FOR DAMASCENE INTERCONNECTS

Method for etching a substrate and a device formed using the method

Method for line etch roughness (LER) reduction for low-k interconnect damascene trench etching

Wafer clamping method

METHOD FOR PREVENTION OF RESIST POISONING IN INTEGRATED CIRCUIT FABRICATION

Silicon Carbide Doped Oxide Hardmask For Single and Dual Damascene Integration

SEMICONDUCTIVE DEVICE HAVING RESIST POISON ALUMINUM OXIDE BARRIER AND METHOD OF MANUFACTURE

Semiconductor device fabricated using a carbon-containing film as a contact etch stop layer