Wing-Shan Tam

Temperature-dependent light-emitting characteristics of InGaN/GaN diodes

Temperature-dependent light-emitting and current–voltage characteristics of multiple-quantum well (MQW) InGaN/GaN blue LEDs were measured for temperature ranging from 100 to 500 K. The measurement results revealed two kinds of defects that have pronounced impact on the electroluminescent (EL) intensity and device reliability of the LEDs. At low-temperature ( 300 K), deep traps due to the structure dislocations at the interfaces significantly reduce the efficiency for radiative recombination though they can enhance both forward and reverse currents significantly. In addition, the significant enhancement of trap-assisted tunneling current causes a large heat dissipation and results in a large redshift of the emission peak at high temperature.

Dynamic Analysis of Two-Phase Switched-Capacitor DC–DC Converters

A method that aims at analyzing the dynamic behavior of some two-phase switched-capacitor charge pump circuits is proposed. A recurrence relation on the voltages across the charging capacitors of a given two-phase charge pump circuit is developed. The output voltage and the accumulated charge of a charge pump circuit after any clock cycle were found by solving some basic matrix equations, with a specific loading current and some required initial conditions. The validation of the proposed method was done by SPICE simulations based on a 8 × linear, Fibonacci, and an exponential charge pump. The analysis results were also verified with the simulation results obtained from some charge pump circuits designed with the 0.18 μm CMOS process. Results show that the proposed method can yield a close estimation on the dynamic behavior of a charge pump circuit in most of the designs. We further found that the rising times for the exponential and Fibonacci charge pumps are shorter, especially when the conversion ratio is high, than that of the linear one.

An overview of charge pumping circuits for flash memory applications

Charge pump is an indispensable component in flash memory systems in order to generate high operation voltages for programming flash memory cells. In this paper, we review some high-efficiency charge pump circuits that fulfill the stringent requirements in modern flash memory technology. The performance of these charge pump circuits will be compared in terms of voltage conversion efficiency, power efficiency, area, and process requirement. Some advanced charge pump circuits proposed recently will also be introduced.

Subthreshold parameters of radio-frequency multi-finger nanometer MOS transistors

The subthreshold radio-frequency (RF) characteristics of multi-finger nanoscale MOS transistors were studied by using the measured scattering (s) parameters. Small-signal circuit parameters were determined based on a simplified small-signal equivalent circuit model. We found that besides the source and gate resistances, most of the parameters such as the channel resistance, drain inductance and intrinsic capacitance are found to be significantly different to those in the saturation mode of operation. The subthreshold channel resistance increases and the drain inductance decreases as the finger number increases because of the more significant charge transport along the finger boundaries. In addition, the channel resistance can be governed by the drain-induced barrier lowering in a transistor with very short gate length. The equivalent intrinsic capacitance of the small-signal equivalent circuit is governed by the substrate resistance and capacitance which make the parameter extraction more difficult.

Double edge-triggered half-static clock-gated D-type flip-flop

This paper proposes a double edge-triggered half-static clock-gated D-type flip-flop (DHSCGFF), which consists of two parallel dynamic master latches connected in parallel and a single half-static latch with clock-gating circuit. The proposed DHSCGFF makes use of a clock-gating circuit to achieve better race tolerance, circuit compactness and energy efficiency without the use of pulse generator. Simulation results of the proposed circuit using a 0.18 µm technology is presented. Results indicate that the proposed circuit can achieve a 4 Gbits/sec data rate and a 96% redundant power reduction.

High-Performance Resistorless Sub-1V Bandgap Reference Circuit Based on Piecewise Compensation Technique

A piecewise compensated sub-lV CMOS bandgap reference without using any resistors is presented. The design reduces the silicon chip area with improved circuit robustness. The bandgap reference is simulated with Spectre using SMIC 0.18 mum CMOS technology. It operates at a minimum voltage of 1.5 V and generates a stable voltage at 0.658 V with minimal temperature coefficient of plusmn 5.36 ppm/degC for temperature ranging from -10 to 130degC. It has a line regulation of 0.89% and a high power supply rejection ratio of -42.3 dB. The power consumption of this circuit is as low as 0.229 mA at 1.5 V input voltage.

Design strategy for two-phase switched capacitor step-up charge pump

This paper presents a systematic approach to generate 2-phase switched capacitor DC-DC step-up converters with a given integer conversion ratio. The present method has a deterministic complexity and does not require any search. The generated charge pumps make use of theoretical minimum number of capacitors to achieve conversion ratios from 2 to 29, and almost theoretical minimum number of capacitors for all other conversion ratios. Design examples are presented to illustrate the proposed method.

A dynamic-biasing 4× charge pump based on exponential topology

A 4× charge pump using exponential topology is proposed and implemented. Comparing to the conventional implementations, the proposed circuit suppresses the reverse current effectively without using different threshold-voltage transistors and additional capacitors. Also, the body effect found in the charge transfer switches is eliminated. The proposed charge pump is analyzed with the state-space method and fabricated using 0.35µm complementary metal-oxide-semiconductor process. Results show that the output voltages close to the ideal one, and a maximum power efficiency of 95% was recorded. Copyright

Off-state drain breakdown mechanisms of VDMOS with anti-JFET implantation

Abstract Efficiency, reliability, and cost are the important design considerations of a vertical double diffused MOSFET (VDMOS) because of its high-voltage applications in consumer electronics. To minimize the cost, the devices were normally fabricated on an epitaxial layer which was grown on a highly-doped substrate. Meanwhile, it was proposed that the efficiency of a VDMOS can be enhanced by conducting an anti-JFET implant to reduce the “ON” resistance of the transistor. This paper reports the effects of anti-JFET implant on the reliability and the blocking capability of the VDMOS. Experimental results show that the anti-JFET implant can reduce the ON resistance by suppressing the channel depletion due to the parasitic JFET and enhance the breakdown voltage by moving the high-field region to the surface channel region. However, it deteriorates the device reliability greatly because the oxide quality was deteriorated and the hot holes generated in the surface high-field region could be easily injected into the gate oxide and hence caused larger subthreshold conduction and drain breakdown at lower voltage.

A low-voltage charge pump with wide current driving capability

A high current driving capability charge pump circuit is proposed. By adopting the dynamic boosting circuit, the overdrive voltages of all the charge transfer switches (CTSs) in the charge pump are maintained for a large loading current. In addition, the largest voltage difference between any of the terminals of all the transistors does not exceed the supply voltage VDD, and solves the gate-oxide overstress problem in the conventional charge pump circuits and enhances the reliability. Other advantages of the proposed charge pump include high pumping efficiency because of no threshold voltage drop and 2-phase operation, without the need of extra power consumption on the logic circuits and drivers. The proposed charge pump circuit is designed and simulated based on a low voltage process. Results show that the charge pump can operate in a wide output current range.