Woei Lin

A top-down processor allocation scheme for hypercube computers

An efficient processor allocation policy is presented for hypercube computers. The allocation policy is called free list since it maintains a list of free subcubes available in the system. An incoming request of dimension k (2/sup k/ nodes) is allocated by finding a free subcube of dimension k or by decomposing an available subcube of dimension greater than k. This free list policy uses a top-down allocation rule in contrast to the bottom-up approach used by the previous bit-map allocation algorithms. This allocation scheme is compared to the buddy, gray code (GC), and modified buddy allocation policies reported for the hypercubes. It is shown that the free list policy is optimal in a static environment, as are the other policies, and it also gives better subcube recognition ability compared to the previous schemes in a dynamic environment. The performance of this policy, in terms of parameters such as average delay, system utilization, and time complexity, is compared to the other schemes to demonstrate its effectiveness. The extension of the algorithm for parallel implementation, noncubic allocation, and inclusion/exclusion allocation is also given. >

Reliability evaluation of hypercube multicomputers

An analytic model for the reliability evaluation of hypercube multicomputers is presented. The model is based on the decomposition principle, where a hypercube of a higher dimension is recursively decomposed into smaller hypercubes, until the reliability of the smallest cube is modeled exactly. The reliability of the large n-cube is then obtained from this smallest base model using a recursive equation. The reliability model used is task-based, i.e., it is assumed that the system is operational if a task can be executed on the system. Analytic results are given for n-dimensional hypercubes with up to 75% system degradation. The model is validated by comparison of analytic results with simulation results. >

Fast data selection and broadcast on the Butterfly network

A quadtree communication structure is presented, along with two associated procedures for efficient, contention-free data selection and broadcast on the BBN Butterfly parallel processor and its family. the proposed structure suggests a general approach to mapping a class of parallel algorithms with intensive communication requirements for performing two primitive operations: selecting data from many different sources and distributing data from a single source. While performing these two operations through the quadtree structure, the two procedures, ascend and descend, incur no link conflicts in the Butterfly network. By properly merging messages and efficiently replicating data, they can complete required communications in O(log/sub 4/ M) parallel steps, where M is the size of a Butterfly parallel processor. Contraction and stretch of the quadtree communication structure while retaining the conflict-free property, is considered. The contracted and stretched tree structures allow the adaptive balance of computations and communication requirements for various algorithms with different computation/communication ratios.<<ETX>>

Distributed fault diagnosis in multistage network-based multiprocessors

This paper is concerned with a distributed, system level fault diagnosis scheme for multistage network-based multiprocessors. The target system, which we choose as a representative, employs a multistage interconnection network with 4/spl times/4 switching elements. We propose a fast diagnostic method which uses a quadtree and its coupler structure. These two quadtree structures partition the system into a number of link-independent groups. This partitioning provides an important diagnostic property; the communication paths in each link-independent group are either identical or disjoint. Several previous works in fault diagnosis investigated the multistage interconnection network only. This paper presents an entire multiprocessor diagnosis, including the detection and location of single faults caused by processor nodes, switching elements, and communication links. In addition, the diagnosis of a group of multiple faults partitioned by the tree structures is also discussed. >

A conflict-free routing scheme on multistage interconnection networks

A conflict-free routing scheme is presented for a class of parallel and distributed computing systems. The core of the scheme is a quadtree communication structure. The quadtree structure suggests a general approach to mapping a class of parallel algorithms with intensive communication requirements for selecting data from many different sources and distributing data from a single source. By properly merging messages and efficiently replicating data, the quadtree structure can complete required communications in O(log/sub 4/ M) parallel steps, where M is the network size. It is shown that the size of a quadtree communication structure can be contracted and stretched by adjusting the number of descendent nodes without affecting its conflict-free property. The relationship between the computation/communication ratio of various parallel algorithms and the number of tree levels is presented, and finally, their joint effect on the response time of combining and distributing data messages is examined. This analysis helps determine the optimal adaptation of the quadtree for minimizing the overall algorithm execution time. >

Adaptive Algorithm-Based Fault Tolerance for Parallel Computing in Linear Systems

This paper presents a dynamically adaptive stabilization scheme for parallel matrix computation. The scheme performs automatic error detection and correction through inserting redundant, but concurrent tracer computations within the folds of the regular computation. It also eliminates the costly row interchange used in classical pivoting. A fault-tolerant double wavefront matrix algorithmfor a MIMD array multi-processor with toroidal inter connection has been designed to demonstrate the strength of the proposed scheme. This algorithm can compute: i) matrix inverse ii) solution vector to the linear system and Hi) predetermined linear combination of the solution vector from identical algorithmic framework. This efficient tri-solution algorithm excels most other known methods in parallel performance.