Wolfgang Küchlin

Formal methods for the validation of automotive product configuration data

In the automotive industry, the compilation and maintenance of correct product configuration data is a complex task. Our work shows how formal methods can be applied to the validation of such business critical data. Our consistency support tool BIS works on an existing database of Boolean constraints expressing valid configurations and their transformation into manufacturable products. Using a specially modified satisfiability checker with an explanation component, BIS can detect inconsistencies in the constraints set and thus help increase the quality of the product data. BIS also supports manufacturing decisions by calculating the implications of product or production environment changes on the set of required parts. In this paper, we give a comprehensive account of BIS: the formalization of the business processes underlying its construction, the modifications of satisfiability-checking technology we found necessary in this context, and the software technology used to package the product as a client–server information system.

PaSAT-parallel sat-checking with lemma exchange : Implementation and applications

Abstract We present PaSAT, a parallel implementation of a Davis-Putnam-style prepositional satisfiability checker incorporating dynamic search space partitioning, intelligent backjumping, as well as lemma generation and exchange; the main focus of our implementation is on speeding up SAT-checking of prepositional encodings of real-world combinatorial problems. We investigate and analyze the speed-ups obtained by parallelization in conjunction with lemma exchange and describe the effects we observed during our experiments. Finally, we present performance measurements from the application of our prover in the areas of formal consistency checking of industrial product documentation, cryptanalysis, and hardware verification. We would like to thank Jurgen Ellinger for help on carrying out the experiments.

Parallel propositional satisfiability checking with distributed dynamic learning

We address the parallelization and distributed execution of an algorithm from the area of symbolic computation: propositional satisfiability (SAT) checking with dynamic learning. Our parallel programming models are strict multithreading for the core SAT checking procedure, complemented by mobile agents realizing a distributed dynamic learning process. Individual threads treat dynamically created subproblems, while mobile agents collect and distribute pertinent knowledge obtained during the learning process. The parallel algorithm runs on top of our parallel system platform Distributed Object-Oriented Threads System, which provides support for our parallel programming models in highly heterogeneous distributed systems. We present performance measurements evaluating the performance gains by our approach in different application domains with practical significance.

Virtual Java devices. Integration of fieldbus based systems in the Internet

The authors introduce the concept of virtual Java devices to integrate fieldbus-based control systems on the Internet/Intranet. As a result, fieldbus systems are opened up for remote monitoring, remote maintenance and remote control applications using state-of-the-art Web technology. A virtual Java device reflects the behaviour of a single fieldbus node or even an aggregation of fieldbus nodes which build a system unit. Implementations of virtual Java devices are embedded in a modern middleware system that provides an infrastructure for the development of distributed systems with almost no additional programming effort on communication aspects. Their work is based on experiences with virtual Java device implementations for a fieldbus-based production cell which allow remote access for control applications and Web-based Java clients.

Integrated static analysis for Linux device driver verification

We port verification techniques for device drivers from the Windows domain to Linux, combining several tools and techniques into one integrated tool-chain. Building on ideas from Microsofts Static Driver Verifier (SDV) project, we extend their specification language and combine its implementation with the public domain bounded model checker CBMC as a new verification back-end. We extract several API conformance rules from Linux documentation and formulate them in the extended language SLICx. Thus SDV-style verification of temporal safety specifications is brought into the public domain. In addition, we show that SLICx, together with CBMC, can be used to simulate preemption in multi-threaded code, and to find race conditions and to prove the absence of deadlocks and memory leaks.

A case study of multi-threaded Gröbner basis completion

We investigate sources of parallelism in the Grobner Basis algorithm for their practical use on the desk-top. Our execution environment is a standard multi-processor workstation, and our parallel programming environment is PARSAC-2 on top of a multi-t breaded operating system. We invest igate the performance of two main variants of our master parallel algorithm on a standard set of examples. The first version exploits only work parallelism in a strategy compliant way. The second version investigates search parallelism in addkion, where large super-linear speedups can be obtained. These speedups are due to improved S-polynomial selection behavior and therefore camy over to single processor machines. Since we obtain our parallel variants by a controlled variation of only a few parameters in the master algorithm, we obtain new insights into the way in which different sources of parallelism interact in Grobner Basis completion.

The Virtual Automation Lab-Web based teaching of automation engineering concepts

Our Virtual Automation Lab is a Web based interactive learning environment for both Computer Science and Automation Engineering concepts within a virtual university setting. We describe three Lab exercises in which students learn how to operate CAN fieldbus devices without any physical proximity to the devices themselves. One of the exercises is a pure simulation realized with a Java applet. In the other exercises, Java applets provide a remote interface to a server which acts as a bridge between the Internet and the CAN fieldbus. No proprietary software has to be installed and no browser plug-ins are needed to access the devices via the Internet. While our exercises pave the ground for teaching Lab based courses over the Internet, or enriching physical Labs with virtual devices that are located elsewhere, our Java based software solutions may also form the basis for industrial applications like remote control, monitoring, maintenance, or data acquisition.

ZetaSAT - Boolean SATisfiability solving on Desktop Grids

ZetaSAT is a research effort to enable efficient parallel Boolean satisfiability (SAT) solving on the Desktop Grid. ZetaSAT is based on the Desktop Grid platform Zeta-Grid. Our work particularly addresses specific issues arising when executing constraint satisfaction problems of the kind of SAT in Desktop Grids, like dynamic problem decomposition, load balancing, termination detection, and domain specific fault tolerance. We report on performance measurements indicating the usefulness of our approach.

An object-oriented platform for distributed high-performance symbolic computation

We describe the distributed object-oriented threads system (DOTS), a programming environment designed to support object-oriented fork/join parallel programming in a heterogeneous distributed environment. A mixed network of Windows NT PCs and UNIX workstations is transformed by DOTS into a homogeneous pool of anonymous compute servers forming together a multicomputer. DOTS is a complete redesign of the distributed threads system (DTS) using the object-oriented paradigm both in its internal implementation and in the programming paradigm it supports. It has been used for the parallelization of applications in the field of computer algebra and in the field of computer graphics. We also give a brief account of applications in the domain of symbolic computation that were developed using DTS.

On the walk

Abstract The Grobner Walk is a basis conversion method proposed by Collart, Kalkbrener, and Mall. It converts a given Grobner basis G of a (possibly positive dimensional) polynomial ideal I to a Grobner basis G′ of I with respect to another term order. The target Grobner basis is approached in several steps (the Walk), each performing a simpler Grobner basis computation. We address a host of questions associated with this method: alternative ways of presenting the main algorithm, algorithmic variations and refinements, implementation techniques, promising applications, and its practical performance, including a comparison with the FGLM conversion method. Our results show that the Walk has the potential to become a key tool for computing and manipulating ideal bases and solving systems of equations.