Won Kyu Jeung

Silicon-Based, Multi-Chip LED Package

A new silicon based multi chip white LED PKG for high power application is designed, fabricated and tested. The package is composed of Al layer coated reflector cup, silicon base which has micro through via hole for interconnection, and micro lens. Compared to the most conventional single chip LED PKG, multi chip white LED PKG has many advantages in cost, density, size, thermal resistance and optical efficiency. After numerical analysis, silicon based multi chip LED PKG which has 9 mm times 9 mm with 0.65 mm size is fabricated using simple MEMS technology. The thermal resistance of this new silicon package was about 4-5 K/W from junction to case in simulation and this result could be comparable to that of other high power LED package. Also, this PKG platform has over than 60% increase in optical extraction efficiency. The proposed multi chip LED PKG can find applications, such as a next generation solid state lighting, back light units and etc.

6B-6 An Ultra Small SAW RF Filter using Wafer Level Packaging Technology

Since a multitude of surface acoustic wave (SAW) filters are the key components for wireless communications, they play an important role in todays mobile phone evolution. Increasing the levels of functional integration and size reduction are therefore the major driving forces in recent SAW radio frequency (RF) filter development. This paper presents a pioneering work for design and fabrication of ultra small SAW filter package. A novel wafer level packaging technology based on through-wafer interconnection and wafer-to-wafer bonding is designed to achieve highly miniaturized SAW RF filters. Based on this technology, SAW RF filters for mobile phone systems are developed in the worlds smallest size of 1.0 times 0.8 times 0.25 mm3. It is shown that our newly developed SAW RF filter offers equal frequency characteristics compared with the conventional chip-sized package. And the reliability test result of hermetically sealed SAW filter package will be presented to verify its application to mobile phones. As a result of these developments, wafer-level packaged SAW RF filters will offer considerable advantages over conventional chip-sized packages in many aspects of performance and production, including size, cost, and further integration

Reflowable ISM WLP

A new ISM (image sensor module) WLP (wafer level package) for reflow process is designed, fabricated and tested. The proposed ISM WLP is composed of polymer bonding layer, glass cap wafer for particle free process and CIS (CMOS Image Sensor) chip wafer which has micro via hole interconnection. During the last decades, WLP is highlighted as the next generation ISM Package method for many advantages like high yield (particle free process), small form factor (3D interconnection), low assembly cost and so on. Nevertheless these benefits, there are some difficulties like micro via hole fabrication, low temperature insulation process (inside hole), bottom side oxide etching process, warpage control according to wafer level bonding using different material, and whole process temperature limitation for micro lens damage. Among various fabrication methods for ISM package, COB (Chip on board), COF (Chip on film), and L, T contact WLP from ShellCase are generally used. In case of COB and COF package, it has difficulty in particle control during assembly process. In case of ShellCase type WLP has very complicated fabrication process. Additionally, most of above package has disadvantage in size point of view. Through suggested ISM WLP using thru interconnection via is realized. And we can good photo image using fabricated WLP. It can not only solve problems of conventional packaging structures but also tremendously reduce the manufacturing & assembly cost (include time) of ISM package and realize real chip scale package.

Low temperature multi layer stack wafer bonding technology development

A new wafer bonding approach for 3-D packaging is designed fabricated and tested. We can summarize device market trend in next few words like Low cost, small form factor, integration, high performance, etc. During the last decades, 3-D wafer level packaging (3-D WLP) is highlighted as the next generation packaging method for satisfying market needs. 3-D WLP method has many advantages like low cost (wafer batch process), high performance (shorter electrical length), small form factor (3-D interconnection), low assembly cost and so on. One of the key technologies of 3-D packaging is wafer bonding. In wafer bonding field, low process temperature, high hermeticity, high reliability, multi layer stack and low process cost are main technical stream. Among various fabrication methods polymer bonding, eutectic bonding, silicon fusion bonding and anodic bonding are generally used. In case of polymer bonding, it has difficulty in high hermeticity and high reliability. In case of eutectic bonding, it has very high material cost compared to others. In case of silicon fusion bonding and anodic bonding has very high process temperature. In this paper, new anodic bonding technique is proposed for satisfying low cost, low process temperature, high hermeticity and multi layer stack. Through suggested bonding mechanism, more than 9 glasses to silicones sandwich layer is anodic ally bonded together simultaneously under 200 degree. Obviously, realized sample has very high hermeticity and bonding strength.

Rectangular Microlens Array Having High Sag for Multi Chip LED Packaging

A novel rectangular shape microlens array having high sag for solid-state lighting is presented. The rectangular shape of proposed microlens can maximize the fill factor of silicon based light-emitting-diode (LED) packaging and minimize the optical loss through the reduction of unnecessary reflection at the same time. Microlens, which has high sag, over 3 75 μm and large diameter, over 3 mm can enormously enhance output optical extraction eff iciency. Moreover wafer level packaging technology is adopted to improve the aligning accu racy and mass production of LED packaging. This wafer level microlens array can be direc tly fabricated on LED packaging using replication method. It has many advantages in optica l properties, low cost, high aligning accuracy, and mass production.

Drop impact reliability of MEMS inertial sensors with membrane suspensions for mobile phones

MEMS accelerometers and gyroscopes enable new functions for portable electronics such as smartphones and tablet computers. Membrane suspensions are suitable for the inertial sensors using piezoelectric or piezoresistive effect, but they are susceptible to be damaged by drop impact. In this paper, system-level drop impact reliability was investigated for MEMS inertial sensors with membrane suspensions. Drop tests of the sensor modules mounted on mobile phone mockups were performed to observe effects of package parameters and impact orientation. After repeated drop tests, almost all membranes were broken while the failures could not be expected from component-level simulation. Therefore, a failure mechanism due to membrane buckling was suggested from system-level simulation and correlated with the drop test results. Based on the failure mechanism, new stopper design was applied and the drop impact failure was completely eliminated.

Wafer level package for image sensor module

A new ISM (image sensor module) WLP (wafer level package) for reflow process is designed, fabricated and tested. The ISM WLP is composed of polymer bonding layer, glass cap wafer for particle free process and CIS (CMOS Image Sensor) chip wafer which has micro via hole interconnection. During the last decades, WLP is highlighted as the next generation ISM Package method for many advantages like high yield (particle free process), small form factor (3D interconnection), low assembly cost and so on. Nevertheless these benefits, there are some problems like micro via hole fabrication, low temperature insulation process (inside hole), bottom side oxide etching, warpage control according to wafer level bonding using different material, and whole process temperature limitation for micro lens damage. Among various fabrication methods for ISM package, COB (Chip on board), COF (Chip on film), and L, T contact WLP from ShellCase are generally used. In case of COB and COF package, it has difficulty in particle control during assembly process. In case of ShellCase type WLP has very complicated fabrication process. Additionally, most of above package has disadvantage in size point of view. Through suggested ISM WLP using through interconnection via, wafer level fabrication & packaging technology is realized. It can not only solve problems of conventional packaging structures but also tremendously reduce the manufacturing & assembly cost (include time) of ISM package and realize real chip scale package. Based on sensor size, 3.67 times 3.42 times 0.39 (H) mm3 WLP is designed. During the parametric study using commercial 3-D simulation programs, silicon thickness, polymer bonding layer thickness, and glass thickness were chose the effective factor. And considering the optical and electrical analysis, we decide the parameter: silicon thickness is 0.1 mm, polymer bonding layer thickness is 0.04 mm, and glass thickness is 0.25 mm. The fabrication process is composed bonding layer patterning, wafer bonding, thinning, via etching, passivation layer deposition, bottom oxide opening, metal plating, bottom electrode patterning, solder ball formation, and dicing. A new concept of ISM WLP has been founded to be suitable structure for low cost, small form factor application.

Large Displacement Out-Of-Plane Bimorph Actuator for Optical Application

A new thermal bimorph actuator for large out-of-plane displacement is designed, fabricated and tested. The deflecting beam is composed of polyimide, heater, and polyvinyl difluorides with tetrafluoroethylene (PVDF-TrFE). The large difference of coefficient of thermal expansion (CTE) of two polymer layers (polyimide and PVDF-TrFE) can generate a large deflection with relatively small temperature rising. Compared to the most conventional micro actuators based on MEMS (micro-electro mechanical system) technology, a large displacement, over 1 mm at 20 mW, could be achieved. The proposed actuator can find applications where a large vertical displacement is needed while keeping compact overall device size, such as a micro zooming lens, micro mirror, micro valve and optical application.