Wouter De Cock

A 63,000 Q-factor relaxation oscillator with switched-capacitor integrated error feedback

There is a growing interest in implementing on-chip reference clock generators for low-cost low-power area-efficient SoCs, such as implantable biomedical devices and microcomputers. Relaxation oscillators are suitable candidates to generate such reference clocks due to their compact size, low power consumption and wide frequency tuning range. However, the poor phase noise performance and large long-term variation are two major problems that limit their application.

A 1.7mW 11b 1–1–1 MASH ΔΣ time-to-digital converter

Recently, high-resolution TDCs have gained more and more popularity due to their increasing implementation in digital PLLs, ADCs, jitter measurement and time-of-flight measurement units. Similar to ADCs, existing architectures of TDCs can be divided into several categories: flash TDCs [1, 3], pipeline TDCs [2], and SAR TDCs [4]. The highest achievable time resolution of a TDC is mainly limited by the CMOS gate delay. In order to achieve sub-gate-delay resolution, the Vernier method is commonly used. However, the mismatch problem caused by process variation limits its effectiveness, and the same holds for the time amplification method. The gated-ring-oscillator (GRO) method [5] is introduced to achieve sub-ps time resolution, but it still requires an equivalent CMOS gate delay as low as 6ps. Upcoming applications in 4th-generation nuclear reactors, space, and high-energy physics such as the large Hadron collider (LHC), require the TDC to achieve a high time resolution in harsh environments with high temperature and radiation, where the threshold voltage, transconductance, and delay of a transistor undergo dramatic changes. In these cases, the high accuracy and robustness of the TDC need to be inherent to the design rather than by employing a fast CMOS technology.

A 4.5 MGy TID-Tolerant CMOS Bandgap Reference Circuit Using a Dynamic Base Leakage Compensation Technique

The total-ionizing-dose (TID) radiation tolerance of bandgap references in deep-submicron CMOS technology is generally limited by the radiation introduced leakage current in diodes. An analysis of this phenomenon is given in this paper, and a dynamic base leakage compensation (DBLC) technique is proposed to improve the radiation hardness of a bandgap reference built in a standard 0.13 μm CMOS technology. A temperature coefficient of 15 ppm/^°C from -40^°C to 125^°C is measured before irradiation. The voltage variation from 0^°C to 100^°C is only ±1 mV for an output voltage of 600 mV. Gamma irradiation assessment proves that the bandgap reference is tolerant to a total ionizing dose of at least 4.5 MGy. The output reference voltage exhibits a variation of less than 3% during the entire experiment, when the chip is irradiated by gamma ray at a dose rate of 27 kGy/h.

A 2.5 V, 10 GHz Fully Integrated LC-VCO with Integrated High- Q Inductor and 30% Tuning Range

A 10 GHz fully integrated Voltage Controlled Oscillator is presented. A 29.7% tuning range is achieved from a 2.5 V power supply. The phase noise is −113 dBc/Hz at 600 kHz and −127 dBc/Hz at 3 MHz. The VCO is implemented in a 0.25 μm 4 metal layer standard CMOS technology. This design will be used to discuss design and layout issues for high frequency LC-oscillators. A thorough analysis will be made of the contribution of the different building blocks to the performance of the total circuit.

A MGy, Low-Offset Programmable Instrumentation Amplifier IC for Nuclear Applications

This paper shows a customized MGy radiation tolerant instrumentation amplifier. The 65 nm CMOS-based ASIC amplifier has an offset smaller than 1 μV and a noise level below 50 nV/√Hz from DC. It consumes less than 5 mW and has a common-mode-rejection-ratio larger the 100 dB. In addition, it allows a programmable gain setting from 8,16,32,64,128 to 256. The performance of this instrumentation amplifier was monitored during an on-line radiation experiment up to a total ionizing dose larger than 1 MGy, enabling the read-out of the most common nuclear temperature and position sensors.

Design and functional validation of a complex impedance measurement device for characterization of ultrasonic transducers

This paper presents the design and practical implementation of a complex impedance measurement device capable of characterization of ultrasonic transducers. The device works in the frequency range used by industrial ultrasonic transducers which is below the measurement range of modern high end network analyzers. The device uses the Goertzel algorithm instead of the more common FFT algorithm to calculate the magnitude and phase component of the impedance under test. A theoretical overview is given followed by a practical approach and measurement results.

Design and implementation of an ultrasonic local positioning system for robot guidance in a heavy liquid metal environment

In this paper, we describe a preliminary research towards the use of chirp coded spread spectrum techniques to implement a local positioning system to assist robot operators during manipulations and maintenance tasks in the future MYRRHA reactor. Preliminary test results in a simple experimental setup show promising results towards further developments of the system as the developed algorithms are able to discriminate between different transducers.

Design and assessment of a 6 ps-resolution time-to-digital converter with 5 MGy gamma-dose tolerance for nuclear instrumentation

Time-to-Digital Converters (TDCs) are key building blocks in time-based mixed-signal systems, used for the digitization of analog signals in time domain. A short survey on state-of-the-art TDCs is given. In order to realize a TDC with picosecond time resolution as well as multi MGy gamma-dose radiation tolerance, a novel multi-stage noise-shaping (MASH) delta-sigma (ΔΣ) TDC structure is proposed. The converter, implemented in 0.13 μm, achieves a time resolution of 5.6 ps and an ENOB of 11 bits, when the oversampling ratio (OSR) is 250. The TDC core consumes only 1.7 mW, and occupies an area of 0.11 mm2. Owing to the usage of circuit level radiation hardened-by-design techniques, such as passive RC oscillators and constant-gm biasing, the TDC exhibits enhanced radiation tolerance. At a low dose rate of 1.2 kGy/h, the frequency of the counting clock in the TDC remains constant up to at least 160 kGy. Even after a total dose of 3.4 MGy at a high dose rate of 30 kGy/h, the TDC still achieves a time resolution of 10.5 ps with an OSR of 250.

Design and test of a robust multi-channel programmable sensor interface circuit for use in extreme environments

This article describes the design of a sensor interface circuit for the amplification of voltages and currents. The created PCB was tested at high temperatures and under gamma irradiation. Two different operational amplifiers were compared.

MGy Radiation Assessment of a Space-Graded Amplifier and ADC

This paper shows a high total dose radiation assessment on a set of space qualified components. Two space graded COTS (Commercial off-the-shelf) components were selected and monitored under 60Co gamma radiation, namely an instrumentation amplifier and a 14 bit analogue-to-digital-converter (ADC). The specifications of these COTS components were monitored on-line with a customized test bed, up-to a total ionizing dose larger than 1 MGy and are presented in this paper.