Wouter Dekkers

Ultrahigh Capacitance Density for Multiple ALD-Grown MIM Capacitor Stacks in 3-D Silicon

ldquoTrenchrdquo capacitors containing multiple metal-insulator-metal (MIM) layer stacks are realized by atomic-layer deposition (ALD), yielding an ultrahigh capacitance density of 440 at a breakdown voltage VDB > 6 V. This capacitance density on silicon is at least 10times higher than the values reported by other research groups. On a silicon substrate containing high-aspect-ratio macropore arrays, alternating MIM layer stacks comprising high-k Al2O3dielectrics and TiN electrodes are deposited using optimized ALD processing such that the conductivity of the TiN layers is not attacked. Ozone annealing subsequent to each Al2O3 deposition step yields significant improvement of the dielectric isolation and breakdown properties.

ALD Options for Si-integrated Ultrahigh-density Decoupling Capacitors in Pore and Trench Designs

This paper reviews the options of using Atomic Layer Deposition (ALD) in passive and heterogeneous integration. The miniaturization intended by both integration schemes aim at Si-based integration for the former and at die stacking in a compact System-in-Package for the latter. In future Si-based integrated passives a next miniaturization step in trench capacitors requires the use of multiple ‘classical’ MOS layer stacks and the use of so-called high-k dielectrics (based on HfO2, etc.) and novel conductive layers like TiN, etc. to compose MIS and MIM stacks in ‘trench’ and ‘pore’ capacitors with capacitance densities exceeding 200 nF/mm 2 . One of the major challenges in realizing ultrahigh-density trench capacitors is to find an attractive pore lining and filling fabrication technology at reasonable cost and reaction rate as well as low temperature (for back-end processing freedom). As the deposition for the dielectric and conductive layers should be highly uniform, step-conformal and lowtemperature (≤ 400 °C), ALD is an enabling technology here, by virtue of the self-limiting mechanism of this layer-by-layer deposition technique. This article discusses first a few examples of LPCVD deposition of conventional MOS layers with ONO-dielectrics and in situ doped polycrystalline silicon, both as single layers and multilayer stacks. In addition, a few options for ALD deposition of thin dielectric and conductive layers (e.g. HfO2- and TiN-based) will be discussed. The silicon substrates that were used contained high aspect ratio (≥ 20) features with cross-section and spacing of the order of 1 µm.

Spontaneous nanoclustering of ZrO2 in atomic layer deposited LayZr1−yOx thin films

During atomic layer deposition of homogeneous LayZr1−yOx thin films spontaneous segregation of ZrO2 nanocrystals that are embedded in an amorphous La2O3 matrix takes place. This occurs if the Zr content in the LayZr1−yOx film rises above 30%, i.e., if the pulse ratio between the lanthanum precursor and the zirconium precursor is larger than four. X-ray diffraction analysis shows that the ZrO2 nanocrystals are in the tetragonal phase, which is the most stable configuration of this material with the highest dielectric permittivity. These nanocrystal-embedded thin films exhibit higher dielectric constants as the Zr content increases.