Wu Chang

A Practical FMCW Radar Signal Processing Method and Its System Implementation

Frequency modulated continuous wave (FMCW) radar system measures objects and acquires information by changing the sending signal frequency along with the time and by measuring the receiving signals frequency with respect to the sending signals. This paper introduces a practical FMCW radar signal processing method and system. This system is mainly used for eliminating noise interference from the sampled signal, checking out the objective signal, and sending the data as the processing results to a computer through the PCI Interfaces. The results are finally processed by the computer and displayed on its screen. This paper analyzes the signal processing algorithm, and applies it to the system implementation. This processing system uses the universal DSP chip as the core device, thus making it easier to use and transplant. This system can be applied to many fields (mini near-distance radar, aircraft carried radar, etc) as long as the front antenna and transceiver system are well organized. It can also be applied to the vehicle carried radar for distance-measuring

Design and simulation of a Torus topology for network on chip

Abstract Aiming at the applications of NOC (network on chip) technology in rising scale and complexity on chipsystems, a Torus structure and corresponding route algorithm for NOC is proposed. This Torus structure improvestraditional Torus topology and redefines the denotations of the routers. Through redefining the router denotationsand changing the original router locations, the Torus structure for NOC application is reconstructed. On the basisof this structure, a dead-lock and live-lock free route algorithm is designed according to dimension increase. SystemC is used to implement this structure and the route algorithm is simulated. In the four different traffic patterns, average, hotspot 13%, hotspot 67% and transpose, the average delay and normalization throughput of this Torusstructure are evaluated. Then, the performance of delay and throughput between this Torus and Mesh structure iscompared. The results indicate that this Torus structure is more suitable for NOC applications.

Network on Chip: Key Communication Technology in MP-SoC

As the development of deep sub-micron (DSM) technique, integration of more communication applications and processing modules in one single chip is becoming feasible. MP-Soc, as an advacned SoC, has strong abilities in processing, software-hardware cooperation. It is widely used in many applications. The development of MP-SoC is far behind the present technology and technique. The bottleneck of MP-SoC is the low communication efficiency of resouces based on bus architecture. The paper studies NoC, the newest communication technology on chip. Summarizes the present studies, points out some key directions in NoC study, with detailed analysis, and designs an experimental platform system for NoC simulation, specificly for MP-SoC. The paper originates from a NoC project, which is supported by National Natural Science Foundation of China