X. Y. Liu

Bipolar switching behavior in TiN/ZnO/Pt resistive nonvolatile memory with fast switching and long retention

Highly stable bipolar resistive switching behaviors of TiN/ZnO/Pt devices were demonstrated for the first time. The excellent memory characteristics including fast switching speed (<20 ns for set and <60 ns for reset), long retention (in the order of 105 s) and non-electroforming process were demonstrated. The bipolar switching behaviors can be explained by formation and rupture of the filamentary conductive path consisting of oxygen vacancies. The excellent bipolar switching behavior can be attributed to the significant amount of oxygen vacancies in ZnO film and the effect of TiN layer serving as an oxygen reservoir.

Highly uniform resistive switching characteristics of TiN/ZrO2/Pt memory devices

We fabricated the TiN/ZrO2/Pt sandwiched resistive switching memory devices. Excellent bipolar resistive switching characteristics, including a large number of switching cycles and highly uniform switching parameters, as well as long retention time were achieved. The improved switching behavior of TiN/ZrO2/Pt could be attributed to the oxygen reservoir effect of TiN electrodes on the formation and rupture of the filamentary conducting paths by modifying the concentration distributions of the oxygen ions and vacancies in ZrO2 thin films. The results demonstrate the feasibility of high performance resistive switching memory devices based on transition metal oxides by using TiN as the top electrode.

Well controlled multiple resistive switching states in the Al local doped HfO2 resistive random access memory device

The resistive switching behaviors in the sandwiched Ti/HfO2/Pt devices with different doping condition were systematically investigated. We show that, comparing with the undoped and the Al layer doped HfO2 devices, significant improvement of switching characteristics is achieved in the Al local doped HfO2 device, including uniformity, reliability, and operation current. As a result, well controlled multiple switching states are obtained in the local doping device by modulating the set current compliance or the maximal reset voltage, respectively. Our results suggest that the switching characteristics of HfO2 device are very closely related to the inducement and controlling of conductive filaments’ growth in the dielectric layer, which can be considered in the optimization of resistive random access memory device design.

Oxide-based RRAM: Physical based retention projection

Based on the retention failure mechanism of high resistance state due to reconstruction of oxygen vacancy filament in the rupture region, a physical model is proposed to quantify the retention failure behavior of oxide-based RRAM devices, supported by experiments. A new data retention evaluation methodology is proposed to predict the failure probability and lifetime of the memory devices.

Scalability and Reliability Characteristics of CVD HfO2 Gate Dielectrics with HfN Electrodes for Advanced CMOS Applications

Metal-oxide-semiconductor (MOS) devices using a thermally robust HfN/HfO 2 gate stack were fabricated. The equivalent oxide thickness of HfN/HfO 2 gate stack has been aggressively scaled down to 0.75 and 0.95 nm for MOS capacitors and metal-oxide-semiconductor field effect transistors, respectively, after a thermal budget required by the conventional complementary metal-oxide-semiconductor gate-first process. The reliability issues such as time-dependent dielectric breakdown (TDDB) and bias temperature instability (BTI) of the HfN/HfO 2 devices are studied. The stress electric-field-dependent TDDB characteristics are demonstrated and explained by a model taking into account the high energetic carrier trapping in the HfO 2 and at the HfO 2 /Si interfacial layer. The polarity dependent BTI characteristics are observed which can be explained by a generalized reaction-diffusion model. These intrinsic reliability characteristics are correlated with the low pre-existing charge traps in HfO 2 gate stack resulting from a high temperature postdeposition annealing of the HfN/HfO 2 gate stack.

Oxygen-Vacancies-Related Room-Temperature Ferromagnetism in Polycrystalline Bulk Co-Doped TiO2

Room-temperature ferromagnetism (RTFM) is observed in the bulk Co x Ti 1 - x O 2 - δ (0.06 ≤ x ≤ 0.1) samples synthesized by the solid-state reaction method for the mixed powder of Ti and Co oxides, followed by a 500°C furnace annealing process in a 10% hydrogen-argon mixture of ambient gases. The X-ray diffraction, X-ray photoelectron spectroscopy, and measurements of magnetic susceptibility, Χ, vs temperature, T, indicate polycrystalline Co-doped TiO 2 anatase without Co clusters was fabricated. A phase transformation from CoTiO 3 to Co x Ti 1 - x O 2 - δ occurs after the hydrogenation process. These results are strong indications for formation of oxygen vacancies near the high spin Co 2 + sites, and the formed oxygen vacancies are essential for the generation of RTFM in Co x Ti 1 - x O 2 - δ . Based on these observations, ferromagnetism in bulk Co x Ti 1 - x O 2 - δ anatase could be attributed to the exchange interaction between Co 2 + mediated by oxygen vacancies near Co 2 + sites, not being caused by Co clusters.

Identification and application of current compliance failure phenomenon in RRAM device

A new current sweep measurement method is introduced to investigate the details of the set process. The electrode-dependent current compliance failure phenomenon is investigated in oxide-based resistive switching memory. The results indicate that the amount of conductive filaments formed in the oxide layer is the critical factor that influences the set behavior (sudden or slowly) and causes the compliance failure. The different switching behaviors measured by the current sweep mode could be used as a criterion for distinguishing the RRAM devices from the applications of 1D1R or multilevel storage.

Bipolar resistive switching behaviors of Ag/Si 3 N 4 /Pt memory device

The resistive switching behavior of Ag/Si₃N₄/Pt device was observed and studied for the first time. Resistance ratio larger than 4*10² and 10⁴s retention time were achieved which indicating its potential for resistive switching memory application. A physical model is proposed to explain the resistive switching behaviors of Ag/Si₃N₄/Pt devices.

Current Compliance-Free Resistive Switching in Nonstoichiometric CeOx Films for Nonvolatile Memory Application

The RS behaviors of stoichiometric and nonstoichiometric CeOx films were studied. Current compliance-free resistive switching was achieved in the nonstoichiometric CeOx film, which are helpful to remove the limitation of current compliance to simplify RRAM circuits design.

Characteristics of sub-1 nm CVD HfO/sub 2/ gate dielectrics with HfN electrodes for advanced CMOS applications

High quality thermal robust CVD-HfO/sub 2/ gate dielectrics with HfN electrodes were fabricated. The scalability of the HfN/HfO/sub 2/ gate stack and the integration issues with CMOS devices were systematically investigated. The equivalent oxide thickness (EOT) is aggressively scaled down to 0.65 nm with low gate leakage and excellent reliability characteristics. High performance HfN/HfO: gated nMOSFET with 0.95 nm EOT was fabricated by using a gate-first process compatible with standard CMOS process flow. Significantly improved effective electron mobility is achieved in the device. The improved mobility is related to a high temperature post annealing process after HfO/sub 2/ deposition in the gate-first process such as the S/D activation annealing, which could effectively reduce the charge traps in HfO/sub 2/ films. A dual metal gate integration process for HfO/sub 2/ CMOS devices is demonstrated using a HfN dummy metal layer. In the process, the dummy HfN metal gate electrode was selectively removed from high-temperature annealed HfN/HfO: gate stack by diluted hydrofluoric without causing any degradation to the underlying HfO/sub 2/ gate dielectrics. Then two other metals with appropriate work functions for dual-gate CMOS, such as Ta for n-MOS and Ni for p-MOS were then re-deposited on HfO/sub 2/ as the new gate electrodes. The resulting n- and p-MOS devices show a work function difference of -0.8 eV.