Xiangcheng Wang

High Efficiency Parallel Post Regulator for Wide Range Input DC–DC Converter

A high efficiency parallel post regulator for wide range input dc-dc converter is proposed. It achieves ZVS in the primary side switches in full range load due to operation; it also reduces voltage stresses across main rectifiers and has smaller conduction losses compared with the conventional post regulators; furthermore the requirement of input and output filters are significantly reduced due to the perfect filtered waveforms. A 250-400 Vdc 12 V/40 A prototype has been built and detailed experimental results are given to verify the theoretic analysis.

VR Transient Improvement at High Slew Rate Load—Active Transient Voltage Compensator

To meet the stringent transient response requirements of a voltage regulator (VR) at high slew rate load current while keeping high VR efficiency, this paper proposes a new topology: active transient voltage compensator (ATVC). ATVC only engages in transient periods operating at several MHZ to handle ac current and main VR operates at low switching frequency for better efficiency mainly providing dc current. ATVC injects a very high slew rate current in step up load and recovers energy in step down load. With introduction of a transformer, ATVC significantly reduces its conduction and switching losses due to the reduced current. Also, the new topology reduces the number of VR bulk capacitors while keeping the same output impedance. A built prototype and detailed experimental results verify the theoretical analysis.

Non-isolated Half Bridge Buck Based Converter for VRM Application

High efficiency and fast transient response are very critical to voltage regulator module (VRM) and they are contradicted to each other. Continuous output voltage drop with increased current and power densities force small duty cycle operation, resulting in lower efficiency and worse transient response. This paper presents a new, transformer based, nonisolated, buck derived, half bridge converter for VRM application. The transformer in the presented topology helps in decreasing the top switch current as well as the bottom switch voltage stresses, it also extends the duty cycle to a favorable range enhancing the efficiency and transient response by optimizing MOSFET selections. The proposed converter is designed, analyzed and the experimental results are presented.

High Efficiency High Power Density DC/DC Converter with Wide Input Range

A high efficiency parallel post regulator (PPR) for wide range input DC/DC converter is presented in this paper. It achieves ZVS in the primary side switches in full range load due to 0.5 duty cycle operation; it also reduces voltage stresses across main rectifiers and it has smaller conduction losses compared with the conventional secondary side post regulators; furthermore the requirement of input and output filters are significantly reduced due to the filtered waveforms PPR produced. A 250sim;400Vdc 12V/40A prototype has been built and detailed experimental results are given to verify the theoretic analysis

Magnetics design for active transient voltage compensator

This paper is mainly focused on how to design the transformer to meet the requirements of active transient voltage compensator (ATVC) circuit. The FEM transformer design method is discussed in detail. ATVC is a solution to the challenging transient requirement of VRM under high slew rate load current. It only works in transient periods and the main VR operates in low frequency which results in high efficiency. In the steady state, the transformer is just a paralleled large filter inductor. In transient periods, ATVC acts as a transformer, injecting or absorbing high slew rate current that is determined by the transformer leakage inductance. The numerical FEM method is used to design the transformer according to the transformers actual working conditions. The accurate and frequency dependable transformer magnetizing inductance value and the leakage inductance value of each winding can be decided from the FEM results directly. The simulation and experiment results verify this transformer design. The circuit slew rate can reach the 0.11A/mus

Active transient voltage compensator design for VR load line improvement

Active transient voltage compensator (ATVC), only engaged in transient periods, was proposed to improve the VR load line and main VR can be optimized design with better efficiency which mainly handles the dc current. ATVC has reduced switching and conduction losses in extra converter due to the introduction of a transformer and it can also reduce the number of VR capacitors for required voltage tolerance. The compensation network delay times deteriorate the second voltage spike at high slew rate transient, especially in the high bandwidth controller. In this paper, combination of linear and adaptive nonlinear control is used to reduce the delay times of the compensation network. Finally a prototype of 3-Ch VR + ATVC was carried out on Intel motherboard and detailed experimental results are given.