Xiangfeng Duan

Indium phosphide nanowires as building blocks for nanoscale electronic and optoelectronic devices.

Nanowires and nanotubes carry charge and excitons efficiently, and are therefore potentially ideal building blocks for nanoscale electronics and optoelectronics. Carbon nanotubes have already been exploited in devices such as field-effect and single-electron transistors, but the practical utility of nanotube components for building electronic circuits is limited, as it is not yet possible to selectively grow semiconducting or metallic nanotubes. Here we report the assembly of functional nanoscale devices from indium phosphide nanowires, the electrical properties of which are controlled by selective doping. Gate-voltage-dependent transport measurements demonstrate that the nanowires can be predictably synthesized as either n- or p-type. These doped nanowires function as nanoscale field-effect transistors, and can be assembled into crossed-wire p–n junctions that exhibit rectifying behaviour. Significantly, the p–n junctions emit light strongly and are perhaps the smallest light-emitting diodes that have yet been made. Finally, we show that electric-field-directed assembly can be used to create highly integrated device arrays from nanowire building blocks.

Single-nanowire electrically driven lasers

Electrically driven semiconductor lasers are used in technologies ranging from telecommunications and information storage to medical diagnostics and therapeutics. The success of this class of lasers is due in part to well-developed planar semiconductor growth and processing, which enables reproducible fabrication of integrated, electrically driven devices. Yet this approach to device fabrication is also costly and difficult to integrate directly with other technologies such as silicon microelectronics. To overcome these issues for future applications, there has been considerable interest in using organic molecules, polymers, and inorganic nanostructures for lasers, because these materials can be fashioned into devices by chemical processing. Indeed, amplified stimulated emission and lasing have been reported for optically pumped organic systems and, more recently, inorganic nanocrystals and nanowires. However, electrically driven lasing, which is required in most applications, has met with several difficulties in organic systems, and has not been addressed for assembled nanocrystals or nanowires. Here we investigate the feasibility of achieving electrically driven lasing from individual nanowires. Optical and electrical measurements made on single-crystal cadmium sulphide nanowires show that these structures can function as Fabry–Perot optical cavities with mode spacing inversely related to the nanowire length. Investigations of optical and electrical pumping further indicate a threshold for lasing as characterized by optical modes with instrument-limited linewidths. Electrically driven nanowire lasers, which might be assembled in arrays capable of emitting a wide range of colours, could improve existing applications and suggest new opportunities.

General Synthesis of Compound Semiconductor Nanowires

The predictable synthesis of a broad range of multicomponent semiconductor nanowires has been accomplished using laser-assisted catalytic growth. Nanowires of binary group III±V materials (GaAs, GaP, InAs, and InP), ternary III±V materials (GaAs/P, InAs/P), binary II±VI compounds (ZnS, ZnSe, CdS, and CdSe), and binary SiGe alloys have been prepared in bulk quantities as high purity (>90 %) single crystals. The nanowires have diameters varying from three to tens of nanometers, and lengths extending to tens of micrometers. The synthesis of this wide range of technologically important semiconductor nanowires can be extended to many other materials and opens up significant opportunities in nanoscale science and technology. The synthesis of nanoscale materials is critical to work directed towards understanding fundamental properties of small structures, creating nanostructured materials, and developing nanotechnologies. Nanowires and nanotubes have been the focus of considerable attention because they have the potential to answer fundamental questions about one-dimensional systems and are expected to play a central role in applications ranging from molecular electronics to novel scanning microscopy probes. To explore such diverse and exciting opportunities requires nanowire materials for which the chemical composition and diameter can be varied. Over the past several years considerable effort has been placed on the bulk synthesis of nanowires, and while advances have been made using template, laser ablation, solution, and other methods, in no case has it been demonstrated that one approach could be exploited in a predictive manner to synthesize a wide range of nanowire materials. Here we describe the predictable synthesis of a broad range of binary and ternary III±V, II±VI, and IV±IV group semiconductor nanowires using the laser-assisted catalytic growth (LCG) method. Recently, we reported the growth of elemental Si and Ge nanowires using the LCG method, which exploits laser ablation to generate nanometer diameter catalytic clusters that define the size and direct the growth of the crystalline nanowires by a vapor±liquid±solid (VLS) mechanism. A key feature of the VLS growth process and our LCG method is that equilibrium phase diagrams can be used to predict catalysts and growth conditions, thereby enabling rational synthesis of new nanowire materials. Significantly, we show here that semiconductor nanowires of the III±V materials GaAs, GaP, GaAsP, InAs, InP, InAsP, the II±VI materials ZnS, ZnSe, CdS, CdSe, and IV±IV alloys of SiGe can be synthesized in high yield and purity using this approach. Compound semiconductors, such as GaAs and CdSe, are especially intriguing targets since their direct bandgaps give rise to attractive optical and electrooptical properties. The nanowires have been prepared as single crystals with diameters as small as 3 nm, which places them in a regime of strong radial quantum confinement, and lengths exceeding 10 mm. These studies demonstrate that LCG represents a very general and predictive approach for nanowire synthesis, and moreover, we believe that the broad range of III±V, II±VI, and IV±IV nanowires prepared will open up many new opportunities in nanoscale research and technology. The prediction of growth conditions for binary and more complex nanowires using the LCG method is, in principle, significantly more difficult than previous studies of elemental Si and Ge nanowires due to the complexity of ternary and higher order phase diagrams. However, this complexity can be greatly reduced by considering pseudobinary phase diagrams for the catalyst and compound semiconductor of interest. For example, the pseudobinary phase diagram of Au±GaAs shows that Au±Ga±As liquid and GaAs solid are the principle phases above 630 C in the GaAs rich region (Fig. 1). This implies that Au can serve as a catalyst to grow GaAs nanowires by the LCG method, if

High speed graphene transistors with a self-aligned nanowire gate

Graphene has attracted considerable interest as a potential new electronic material. With its high carrier mobility, graphene is of particular interest for ultrahigh-speed radio-frequency electronics. However, conventional device fabrication processes cannot readily be applied to produce high-speed graphene transistors because they often introduce significant defects into the monolayer of carbon lattices and severely degrade the device performance. Here we report an approach to the fabrication of high-speed graphene transistors with a self-aligned nanowire gate to prevent such degradation. A Co2Si–Al2O3 core–shell nanowire is used as the gate, with the source and drain electrodes defined through a self-alignment process and the channel length defined by the nanowire diameter. The physical assembly of the nanowire gate preserves the high carrier mobility in graphene, and the self-alignment process ensures that the edges of the source, drain and gate electrodes are automatically and precisely positioned so that no overlapping or significant gaps exist between these electrodes, thus minimizing access resistance. It therefore allows for transistor performance not previously possible. Graphene transistors with a channel length as low as 140 nm have been fabricated with the highest scaled on-current (3.32 mA μm−1) and transconductance (1.27 mS μm−1) reported so far. Significantly, on-chip microwave measurements demonstrate that the self-aligned devices have a high intrinsic cut-off (transit) frequency of fT = 100–300 GHz, with the extrinsic fT (in the range of a few gigahertz) largely limited by parasitic pad capacitance. The reported intrinsic fT of the graphene transistors is comparable to that of the very best high-electron-mobility transistors with similar gate lengths.

High-performance thin-film transistors using semiconductor nanowires and nanoribbons

Thin-film transistors (TFTs) are the fundamental building blocks for the rapidly growing field of macroelectronics. The use of plastic substrates is also increasing in importance owing to their light weight, flexibility, shock resistance and low cost. Current polycrystalline-Si TFT technology is difficult to implement on plastics because of the high process temperatures required. Amorphous-Si and organic semiconductor TFTs, which can be processed at lower temperatures, but are limited by poor carrier mobility. As a result, applications that require even modest computation, control or communication functions on plastics cannot be addressed by existing TFT technology. Alternative semiconductor materials that could form TFTs with performance comparable to or better than polycrystalline or single-crystal Si, and which can be processed at low temperatures over large-area plastic substrates, should not only improve the existing technologies, but also enable new applications in flexible, wearable and disposable electronics. Here we report the fabrication of TFTs using oriented Si nanowire thin films or CdS nanoribbons as semiconducting channels. We show that high-performance TFTs can be produced on various substrates, including plastics, using a low-temperature assembly process. Our approach is general to a broad range of materials including high-mobility materials (such as InAs or InP).

Flexible Solid-State Supercapacitors Based on Three-Dimensional Graphene Hydrogel Films

Flexible solid-state supercapacitors are of considerable interest as mobile power supply for future flexible electronics. Graphene or carbon nanotubes based thin films have been used to fabricate flexible solid-state supercapacitors with high gravimetric specific capacitances (80-200 F/g), but usually with a rather low overall or areal specific capacitance (3-50 mF/cm(2)) due to the ultrasmall electrode thickness (typically a few micrometers) and ultralow mass loading, which is not desirable for practical applications. Here we report the exploration of a three-dimensional (3D) graphene hydrogel for the fabrication of high-performance solid-state flexible supercapacitors. With a highly interconnected 3D network structure, graphene hydrogel exhibits exceptional electrical conductivity and mechanical robustness to make it an excellent material for flexible energy storage devices. Our studies demonstrate that flexible supercapacitors with a 120 μm thick graphene hydrogel thin film can exhibit excellent capacitive characteristics, including a high gravimetric specific capacitance of 186 F/g (up to 196 F/g for a 42 μm thick electrode), an unprecedented areal specific capacitance of 372 mF/cm(2) (up to 402 mF/cm(2) for a 185 μm thick electrode), low leakage current (10.6 μA), excellent cycling stability, and extraordinary mechanical flexibility. This study demonstrates the exciting potential of 3D graphene macrostructures for high-performance flexible energy storage devices.

High-performance transition metal–doped Pt3Ni octahedra for oxygen reduction reaction

Molybdenum doping drives high activity Platinum (Pt) is an effective catalyst of the oxygen reduction reaction in fuel cells but is scarce. One approach to extend Pt availability is to alloy it with more abundant metals such as nickel (Ni). Although these catalysts can be highly active, they are often not durable because of Ni loss. Huang et al. show that doping the surface of octahedral Pt3Ni nanocrystals with molybdenum not only leads to high activity (∼80 times that of a commercial catalyst) but enhances their stability. Science, this issue p. 1230 Molybdenum-doped platinum-nickel nanocrystal catalysts exhibit high activity and durability for a key fuel cell reaction. Bimetallic platinum-nickel (Pt-Ni) nanostructures represent an emerging class of electrocatalysts for oxygen reduction reaction (ORR) in fuel cells, but practical applications have been limited by catalytic activity and durability. We surface-doped Pt3Ni octahedra supported on carbon with transition metals, termed M‐Pt3Ni/C, where M is vanadium, chromium, manganese, iron, cobalt, molybdenum (Mo), tungsten, or rhenium. The Mo‐Pt3Ni/C showed the best ORR performance, with a specific activity of 10.3 mA/cm2 and mass activity of 6.98 A/mgPt, which are 81- and 73‐fold enhancements compared with the commercial Pt/C catalyst (0.127 mA/cm2 and 0.096 A/mgPt). Theoretical calculations suggest that Mo prefers subsurface positions near the particle edges in vacuum and surface vertex/edge sites in oxidizing conditions, where it enhances both the performance and the stability of the Pt3Ni catalyst.

Highly efficient gate-tunable photocurrent generation in vertical heterostructures of layered materials

Layered materials of graphene and MoS₂, for example, have recently emerged as an exciting material system for future electronics and optoelectronics. Vertical integration of layered materials can enable the design of novel electronic and photonic devices. Here, we report highly efficient photocurrent generation from vertical heterostructures of layered materials. We show that vertically stacked graphene-MoS₂-graphene and graphene-MoS₂-metal junctions can be created with a broad junction area for efficient photon harvesting. The weak electrostatic screening effect of graphene allows the integration of single or dual gates under and/or above the vertical heterostructure to tune the band slope and photocurrent generation. We demonstrate that the amplitude and polarity of the photocurrent in the gated vertical heterostructures can be readily modulated by the electric field of an external gate to achieve a maximum external quantum efficiency of 55% and internal quantum efficiency up to 85%. Our study establishes a method to control photocarrier generation, separation and transport processes using an external electric field.

Holey graphene frameworks for highly efficient capacitive energy storage

Supercapacitors represent an important strategy for electrochemical energy storage, but are usually limited by relatively low energy density. Here we report a three-dimensional holey graphene framework with a hierarchical porous structure as a high-performance binder-free supercapacitor electrode. With large ion-accessible surface area, efficient electron and ion transport pathways as well as a high packing density, the holey graphene framework electrode can deliver a gravimetric capacitance of 298 F g(-1) and a volumetric capacitance of 212 F cm(-3) in organic electrolyte. Furthermore, we show that a fully packaged device stack can deliver gravimetric and volumetric energy densities of 35 Wh kg(-1) and 49 Wh l(-1), respectively, approaching those of lead acid batteries. The achievement of such high energy density bridges the gap between traditional supercapacitors and batteries, and can open up exciting opportunities for mobile power supply in diverse applications.

Vertically stacked multi-heterostructures of layered materials for logic transistors and complementary inverters

The layered materials such as graphene have attracted considerable interest for future electronics. Here we report the vertical integration of multi-heterostructures of layered materials to enable high current density vertical field-effect transistors (VFETs). An n-channel VFET is created by sandwiching few-layer molybdenum disulfide (MoS2) as the semiconducting channel between a monolayer graphene and a metal thin film. The VFETs exhibit a room temperature on-off ratio >103, while at same time deliver a high current density up to 5,000 A/cm2, sufficient for high performance logic applications. This study offers a general strategy for the vertical integration of various layered materials to obtain both p- and n-channel transistors for complementary logic functions. A complementary inverter with larger than unit voltage gain is demonstrated by vertically stacking the layered materials of graphene, Bi2Sr2Co2O8 (p-channel), graphene, MoS2 (n-channel), and metal thin film in sequence. The ability to simultaneously achieve high on-off ratio, high current density, and logic integration in the vertically stacked multi-heterostructures can open up a new dimension for future electronics to enable three-dimensional integration.