Xiaochen Zhang

High-performance flexible oxide TFTs: optimization of a-IGZO film by modulating the voltage waveform of pulse DC magnetron sputtering without post treatment

We propose a facile and scalable approach to fabricate high performance flexible a-IGZO thin film transistors (TFTs) by adopting the waveform modulation of pulse DC magnetron sputtering (PDCMS) to rationally optimize the film quality of semiconductors without post treatment. The voltage waveform was modulated by rationally altering the frequency and duty cycles, and, consequently, an optimum film quality of a-IGZO film was obtained that resulted in the outstanding performance of the flexile oxide TFTs. A series of characterizations (TEM, XRR AFM, XPS, μ-PCD etc.) were carried out to understand the mechanism of a-IGZO semiconductor film growth. The flexible TFT with an optimum a-IGZO film exhibited a mobility (μsat) of 20.9 cm2 V−1 s−1 and good stability under bending strain. This work provides an alternative approach to fabricate high performance flexible a-IGZO TFTs on an industrial scale.

Induced nano-scale self-formed metal-oxide interlayer in amorphous silicon tin oxide thin film transistors

Amorphous Silicon-Tin-Oxide thin film transistors (a-STO TFTs) with Mo source/drain electrodes were fabricated. The introduction of a ~8u2009nm MoOx interlayer between Mo electrodes and a-STO improved the electron injection in a-STO TFT. Mo adjacent to the a-STO semiconductor mainly gets oxygen atoms from the oxygen-rich surface of a-STO film to form MoOx interlayer. The self-formed MoOx interlayer acting as an efficient interface modification layer could conduce to the stepwise internal transport barrier formation while blocking Mo atoms diffuse into a-STO layer, which would contribute to the formation of ohmic contact between Mo and a-STO film. It can effectively improve device performance, reduce cost and save energy for the realization of large-area display with high resolution in future.

Low-temperature fabrication of sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors

In this work, low temperature fabrication of a sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors (TFTs) on polyimide substrates was investigated. The effects of Ar-pressure during the sputtering process and then especially the post-annealing treatments at low temperature (≤200u2009°C) for HfO2 on reducing the density of defects in the bulk and on the surface were systematically studied. X-ray reflectivity, UV-vis and X-ray photoelectron spectroscopy, and micro-wave photoconductivity decay measurements were carried out and indicated that the high quality of optimized HfO2 film and its high dielectric properties contributed to the low concentration of structural defects and shallow localized defects such as oxygen vacancies. As a result, the well-structured HfO2 gate dielectric exhibited a high density of 9.7u2009g/cm3, a high dielectric constant of 28.5, a wide optical bandgap of 4.75u2009eV, and relatively low leakage current. The corresponding flexible a-IGZO TFT on polyimide exhibited an optimal device performance with a saturation mobility of 10.3u2009cm2u2009V−1u2009s−1, an Ion/Ioff ratio of 4.3u2009×u2009107, a SS value of 0.28u2009Vu2009dec−1, and a threshold voltage (Vth) of 1.1u2009V, as well as favorable stability under NBS/PBS gate bias and bending stress.

Effects of Annealing Temperature on Optical Band Gap of Sol-gel Tungsten Trioxide Films

Tungsten trioxide (WO3) is a wide band gap semiconductor material that is used as an important electrochromic layer in electrochromic devices. In this work, the effects of the annealing temperature on the optical band gap of sol-gel WO3 films were investigated. X-ray Diffraction (XRD) showed that WO3 films were amorphous after being annealed at 100 °C, 200 °C and 300 °C, respectively, but became crystallized at 400 °C and 500 °C. An atomic force microscope (AFM) showed that the crystalline WO3 films were rougher than the amorphous WO3 films (annealed at 200 °C and 300 °C). An ultraviolet spectrophotometer showed that the optical band gap of the WO3 films decreased from 3.62 eV to 3.30 eV with the increase in the annealing temperature. When the Li+ was injected into WO3 film in the electrochromic reaction, the optical band gap of the WO3 films decreased. The correlation between the optical band gap and the electrical properties of the WO3 films was found in the electrochromic test by analyzing the change in the response time and the current density. The decrease in the optical band gap demonstrates that the conductivity increases with the corresponding increase in the annealing temperature.

High-Performance Thin Film Transistor with an Neodymium-Doped Indium Zinc Oxide/Al2O3 Nanolaminate Structure Processed at Room Temperature

In this work, a high-performance thin film transistor with an neodymium-doped indium zinc oxide (Nd:IZO) semiconductor via a room temperature approach and adopting the Nd:IZO/Al2O3 nanolaminate structure was investigated. The effects of the ultrathin Al2O3 layer and the thickness of Nd:IZO layer in the nanolaminate structure on the improvement of electrical performance and stability of thin film transistors (TFTs) were systematically studied. Besides the carrier movement confined along the near-channel region, driven by the Al2O3 layer under an electrical field, the high performance of the TFT is also attributed to the high quality of the 8-nm-thick Nd:IZO layer and the corresponding optimal Nd:IZO/Al2O3 interface, which reduce the scattering effect and charge trapping with strong M–O bonds in bulk and the back-channel surface of Nd:IZO, according to the X-ray reflectivity (XRR), X-ray photoelectron spectroscopy (XPS), and micro-wave photo conductivity decay (μ-PCD) results. As a result, the Nd:IZO/Al2O3 TFT exhibits an outstanding performance, with a high μsat of 32.7 cm2·V−1·s−1, an Ion/Ioff of 1.9 × 108, and a low subthreshold swing (SS) value of 0.33 V·dec−1, which shows great potential for the room temperature fabrication of TFTs in high-resolution or high-frame-rate displays by a scalable, simple, and feasible approach.

Enhancement of Electrical Characteristics and Stability of Amorphous Si-Sn-O Thin Film Transistors with SiOx Passivation Layer

In this research, a passivated methodology was proposed for achieving good electrical characteristics for back-channel-etch (BCE) typed amorphous Si-Sn-O thin film transistors (a-STO TFTs). This methodology implied that the thermal annealing (i.e., pre-annealing) should be carried out before deposition of a SiOx passivation layer. The pre-annealing played an important role in affecting device performance, which did get rid of the contamination of the lithography process. Simultaneously, the acceptor-like sub-gap density of states (DOS) of devices was extracted for further understanding the reason for improving device performance. It found that the SiOx layer could reduce DOS of the device and successfully protect the device from surroundings. Finally, a-STO TFT applied with this passivated methodology could possess good electrical properties including a saturation mobility of 4.2 ± 0.2 cm2/V s, a low threshold voltage of 0.00 V, a large on/off current ratio of 6.94 × 108, and a steep subthreshold swing of 0.23 V/decade. The threshold voltage slightly shifted under bias stresses and recovered itself to its initial state without any annealing procedure, which was attributed to the charge trapping in the bulk dielectric layers or interface. The results of this study indicate that a-STO TFT could be a robust candidate for realizing a large-size and high-resolution display.