Zeke Zheng

High-performance back-channel-etched thin-film transistors with amorphous Si-incorporated SnO2 active layer

In this report, back-channel-etched (BCE) thin-film transistors (TFTs) were achieved by using Si-incorporated SnO2 (silicon tin oxide (STO)) film as active layer. It was found that the STO film was acid-resistant and in amorphous state. The BCE-TFT with STO active layer exhibited a mobility of 5.91 cm2/V s, a threshold voltage of 0.4 V, an on/off ratio of 107, and a steep subthreshold swing of 0.68 V/decade. Moreover, the device had a good stability under the positive/negative gate-bias stress.

All-sputtered, flexible, bottom-gate IGZO/Al2O3 bi-layer thin film transistors on PEN fabricated by a fully room temperature process

In this work, an innovative all-sputtered bottom-gate thin film transistor (TFT) using an amorphous InGaZnO (IGZO)/Al2O3 bi-layer channel was fabricated by fully room temperature processes on a flexible PEN substrate. A bi-layer channel consisting of 10 nm-thick IGZO and 3 nm-thick Al2O3 was clearly observed in high resolution TEM images. The chemical structure of IGZO was dependent on different sputtering modes (pulse-DC/DC/RF), which were investigated by XPS measurements. The ultrathin Al2O3 layer on IGZO showed a significant effect on enhancing the mobility, reducing the off-state current, and improving the gate-bias stability. As a result, the IGZO/Al2O3 bi-layer TFT eventually exhibited a saturation mobility of 18.5 cm2 V−1 s−1, an Ion/Ioff ratio of 107, an on-state voltage of 1.5 V and a subthreshold swing of 0.27 V decade−1, as well as good stability under NBS/PBS and bending strain. The fabrication of this TFT can be suitably transferred to large-size arrays or paper-like substrates, which is in line with the trend of display development.

Direct patterning of silver electrodes with 2.4 μm channel length by piezoelectric inkjet printing

The control of channel length is of great significance in the fabrication of thin film transistors (TFTs) with high-speed operation. However, achieving short channel on untreated glass by traditional piezoelectric inkjet printing is problematic due to the impacting and rebounding behaviors of droplet impinging on solid surface. Here a novel method was proposed to obtain short channel length on untreated glass by taking advantage of the difference in the retraction velocities on both sides of an ink droplet. In addition, droplets contact mechanism was first introduced in our work to explain the formation of short channel in the printing process. Through printing droplets array with optimized drop space and adjusting appropriate printing parameters, a 2.4μm of channel length for TFT, to the best of our knowledge, which is the shortest channel on substrate without pre-patterning, was achieved using piezoelectric inkjet printing. This study sheds light on the fabrication of short channel TFT for large size and high-resolution displays using inkjet printing technology.

Room-Temperature Fabrication of High-Performance Amorphous In–Ga–Zn–O/Al2O3 Thin-Film Transistors on Ultrasmooth and Clear Nanopaper

Integrating biodegradable cellulose nanopaper into oxide thin-film transistors (TFTs) for next generation flexible and green flat panel displays has attracted great interest because it offers a viable solution to address the rapid increase of electronic waste that poses a growing ecological problem. However, a compromise between device performance and thermal annealing remains an obstacle for achieving high-performance nanopaper TFTs. In this study, a high-performance bottom-gate IGZO/Al2O3 TFT with a dual-layer channel structure was initially fabricated on a highly transparent, clear, and ultrasmooth nanopaper substrate via conventional physical vapor deposition approaches, without further thermal annealing processing. Purified nanofibrillated cellulose with a width of approximately 3.7 nm was used to prepare nanopaper with excellent optical properties (92% transparency, 0.85% transmission haze) and superior surface roughness (Rq is 1.8 nm over a 5 × 5 μm2 scanning area). More significantly, a bilayer channel structure (IGZO/Al2O3) was adopted to fabricate high performance TFT on this nanopaper substrate without thermal annealing and the device exhibits a saturation mobility of 15.8 cm2/(Vs), an Ion/Ioff ratio of 4.4 × 105, a threshold voltage (Vth) of -0.42 V, and a subthreshold swing (SS) of 0.66 V/dec. The room-temperature fabrication of high-performance IGZO/Al2O3 TFTs on such nanopaper substrate without thermal annealing treatment brings industry a step closer to realizing inexpensive, flexible, lightweight, and green paper displays.

A Simple Method for High-Performance, Solution-Processed, Amorphous ZrO2 Gate Insulator TFT with a High Concentration Precursor

Solution-processed high-k dielectric TFTs attract much attention since they cost relatively little and have a simple fabrication process. However, it is still a challenge to reduce the leakage of the current density of solution-processed dielectric TFTs. Here, a simple solution method is presented towards enhanced performance of ZrO2 films by intentionally increasing the concentration of precursor. The ZrO2 films not only exhibit a low leakage current density of 10−6 A/cm2 at 10 V and a breakdown field of 2.5 MV/cm, but also demonstrate a saturation mobility of 12.6 cm2·V−1·s−1 and a Ion/Ioff ratio of 106 in DC pulse sputtering IGZO-TFTs based on these films. Moreover, the underlying mechanism of influence of precursor concentration on film formation is presented. Higher concentration precursor results in a thicker film within same coating times with reduced ZrO2/IGZO interface defects and roughness. It shows the importance of thickness, roughness, and annealing temperature in solution-processed dielectric oxide TFT and provides an approach to precisely control solution-processed oxide films thickness.

All-Aluminum Thin Film Transistor Fabrication at Room Temperature

Bottom-gate all-aluminum thin film transistors with multi conductor/insulator nanometer heterojunction were investigated in this article. Alumina (Al2O3) insulating layer was deposited on the surface of aluminum doping zinc oxide (AZO) conductive layer, as one AZO/Al2O3 heterojunction unit. The measurements of transmittance electronic microscopy (TEM) and X-ray reflectivity (XRR) revealed the smooth interfaces between ~2.2-nm-thick Al2O3 layers and ~2.7-nm-thick AZO layers. The devices were entirely composited by aluminiferous materials, that is, their gate and source/drain electrodes were respectively fabricated by aluminum neodymium alloy (Al:Nd) and pure Al, with Al2O3/AZO multilayered channel and AlOx:Nd gate dielectric layer. As a result, the all-aluminum TFT with two Al2O3/AZO heterojunction units exhibited a mobility of 2.47 cm2/V·s and an Ion/Ioff ratio of 106. All processes were carried out at room temperature, which created new possibilities for green displays industry by allowing for the devices fabricated on plastic-like substrates or papers, mainly using no toxic/rare materials.

A room temperature strategy towards enhanced performance and bias stability of oxide thin film transistor with a sandwich structure channel layer

Thermal annealing is a conventional and effective way to improve the bias stress stability of oxide thin film transistors (TFT) on solid substrates. However, it is still a challenge for enhancing the bias stress stability of oxide TFTs on flexible substrates by high-temperature post-treatment due to the thermal sensitivity of flexible substrates. Here, a room temperature strategy is presented towards enhanced performance and bias stability of oxide TFTs by intentionally engineering a sandwich structure channel layer consisting of a superlattice with aluminum doped zinc oxide (AZO) and Al2O3 thin films. The Al2O3/AZO/Al2O3-TFTs not only exhibit a saturation mobility of 9.27 cm2 V−1 s−1 and a linear mobility of 11.38 cm2 V−1 s−1 but also demonstrate a better bias stress stability than AZO/Al2O3-TFT. Moreover, the underlying mechanism of this enhanced electrical performance of TFTs with a sandwich structure channel layer is that the bottom Al2O3 thin films can obviously improve the crystalline phase of AZO f...

High-performance flexible oxide TFTs: optimization of a-IGZO film by modulating the voltage waveform of pulse DC magnetron sputtering without post treatment

We propose a facile and scalable approach to fabricate high performance flexible a-IGZO thin film transistors (TFTs) by adopting the waveform modulation of pulse DC magnetron sputtering (PDCMS) to rationally optimize the film quality of semiconductors without post treatment. The voltage waveform was modulated by rationally altering the frequency and duty cycles, and, consequently, an optimum film quality of a-IGZO film was obtained that resulted in the outstanding performance of the flexile oxide TFTs. A series of characterizations (TEM, XRR AFM, XPS, μ-PCD etc.) were carried out to understand the mechanism of a-IGZO semiconductor film growth. The flexible TFT with an optimum a-IGZO film exhibited a mobility (μsat) of 20.9 cm2 V−1 s−1 and good stability under bending strain. This work provides an alternative approach to fabricate high performance flexible a-IGZO TFTs on an industrial scale.

A novel nondestructive testing method for amorphous Si–Sn–O films

Traditional methods to evaluate the quality of amorphous silicon-substituted tin oxide (a-STO) semiconductor film are destructive and time-consuming. Here, a novel non-destructive, quick, and facile method named microwave photoconductivity decay (μ-PCD) is utilized to evaluate the quality of a-STO film for back channel etch (BCE) thin-film transistors (TFTs) by simply measuring the D value and peak reflectivity signal. Through the μ-PCD method, both optimum deposition procedure and optimal annealing temperature are attained to prepare a-STO film with superior quality. The a-STO TFTs are fabricated by the obtained optimum procedure that exhibits a mobility of 8.14 cm2 V−1 s−1, a I on/I off ratio of 6.07 × 109, a V on of -1.2 V, a steep subthreshold swing of 0.21 V/decade, a low trap density (D t) of 1.68 × 1012 eV−1 cm−2, and good stability under the positive/negative gate-bias stress. Moreover, the validity of the μ-PCD measurement for a-STO films is verified by x-ray photoelectron spectroscopy, Hall effect measurement, and the performance of STO TFTs measured by traditional methods. The non-destructive μ-PCD method sheds light on the fast optimization of the deposition procedure for amorphous oxide semiconductor films with excellent quality.

Low-temperature fabrication of sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors

In this work, low temperature fabrication of a sputtered high-k HfO2 gate dielectric for flexible a-IGZO thin film transistors (TFTs) on polyimide substrates was investigated. The effects of Ar-pressure during the sputtering process and then especially the post-annealing treatments at low temperature (≤200 °C) for HfO2 on reducing the density of defects in the bulk and on the surface were systematically studied. X-ray reflectivity, UV-vis and X-ray photoelectron spectroscopy, and micro-wave photoconductivity decay measurements were carried out and indicated that the high quality of optimized HfO2 film and its high dielectric properties contributed to the low concentration of structural defects and shallow localized defects such as oxygen vacancies. As a result, the well-structured HfO2 gate dielectric exhibited a high density of 9.7 g/cm3, a high dielectric constant of 28.5, a wide optical bandgap of 4.75 eV, and relatively low leakage current. The corresponding flexible a-IGZO TFT on polyimide exhibited an optimal device performance with a saturation mobility of 10.3 cm2 V−1 s−1, an Ion/Ioff ratio of 4.3 × 107, a SS value of 0.28 V dec−1, and a threshold voltage (Vth) of 1.1 V, as well as favorable stability under NBS/PBS gate bias and bending stress.