Xie Sheng

Novel pre-equalization transimpedance amplifier for 10 Gb/s optical interconnects*

This paper presents a modified regulated cascode (RGC) transimpedance amplifier (TIA) with a novel pre-equalized technique. The pre-equalized circuit employed the broadband series inductive π-network and Gm-boosting technique. The introduction of this technique compensates the transferred signal at the input port of the TIA without an increase in power dissipation. Furthermore, a novel miller capacitance degeneration method is designed in the gain stage for further bandwidth improvement. The TIA is realized in UMC 0.18 πm CMOS technology and tested with an on-chip 0.3 pF capacitor to emulate a photodetector (PD). The measured transimpedance gain amounts to 57 dBΩ with a −3 dB bandwidth of about 8.2 GHz and consumes only 22 mW power from a single 1.8 V supply.

An optical receiver with automatic gain control for radio-over-fiber system

An optical receiver circuit with automatic gain control (AGC) for radio-over-fiber (RoF) system is presented. The AGC optical receiver is designed on the standard 0.18µm CMOS technology. The proposed circuit uses a differential variable gain amplifier (VGA), implemented by a Gilbert cell and provides an exponential function circuit for the dB linearity of the gain voltage. A large dynamic range of the receiver is from 13dB to 75dB. The AGC loop bandwidth is 3.3GHz, with a power consumption of 101mW and a low noise current of 1.45µA, and the eye diagram of the receiver is also good.

A differential automatic gain control circuit with two-stage −10 to 50 dB tuning range VGAs

A differential automatic gain control (AGC) circuit is presented. The AGC architecture contains two-stage variable gain amplifiers (VGAs) which are implemented with a Gilbert cell, a peak detector (PD), a low pass filter, an operational amplifier, and two voltage to current (V—I) convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-μm single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from −10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit (containing output buffers and a band-gap reference) consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 μs to stabilize the output. The frequency response of the circuit has almost a constant −3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.

Effect of ICP etching on InP-based multiple quantum wells microring lasers

Dry etching of InP-based epitaxial structure was performed by using inductively coupled plasma (ICP) system with different chemistries. The surface topographies shown that the waveguide profiles etched using the Cl2/CH4/Ar recipe have better surface and sidewall quality than that of the Cl2/BCl3 chemistry. To verify the practical influence of ICP etching, InP/AlGaInAs multiple quantum wells microring lasers were fabricated, and the electrical and optical properties were compared. The experimental results revealed that the Cl2/CH4/Ar recipe is preferable to the fabrication of InP-based optoelectronic devices in our experimental system.

An improved 512 bit EEPROM IP for RFID tag IC

A 512 bit EEPROM IP which is based on the SMIC 0.18 µm 2P6M embedded EEPROM process has been designed for RFID tag IC in this paper. The main improvement of the IP circuits includes timing control circuit of the digital circuit, charge pump and sense amplifier of the artificial circuit. A block erasing signal is added in the timing control circuit. Considering the request of low power consumption, the high voltage generator and the regulator of the charge pump are also improved. Current sensing scheme is employed in the design of sense amplifier (SA).

An Automatic Gain Control Circuit for a Single-Chip UHF RFID Reader Transceiver

This paper presents an automatic gain control (AGC) circuit which is used in a single-chip UHF RFID reader transceiver system. The VGA is a fully differential circuit with differential output swing of 1-Vpp. The gain of the two VGAs can be varied linearly from 0dB to 60dB with respect to a control voltage from 0.28V to 0.93V. The exponential voltage to current (V-I) convertor is based on Taylor’s series expansion. The AGC circuit consumes 4.5mA current and has a 2.7MHz 3-dB bandwidth when the gain is 60dB. A differential positive peak detector is used in the AGC circuit loop. The AGC circuit is based on UMC 0.18-μm single-poly six-metal CMOS process technology.

A monolithic, standard CMOS, fully differential optical receiver with an integrated MSM photodetector

This paper presents a realization of a silicon-based standard CMOS, fully differential optoelectronic integrated receiver based on a metal–semiconductor–metal light detector (MSM photodetector). In the optical receiver, two MSM photodetectors are integrated to convert the incident light signal into a pair of fully differential photogenerated currents. The optoelectronic integrated receiver was designed and implemented in a chartered 0.35 μm, 3.3 V standard CMOS process. For 850 nm wavelength, it achieves a 1 GHz 3 dB bandwidth due to the MSM photodetectors low capacitance and high intrinsic bandwidth. In addition, it has a transimpedance gain of 98.75 dBΩ, and an equivalent input integrated referred noise current of 283 nA from 1 Hz up to –3 dB frequency.

A 1.5 Gb/s monolithically integrated optical receiver in the standard CMOS process

A monolithically integrated optical receiver, including the photodetector, has been realized in Chartered 0.35 μm EEPROM CMOS technology for 850 nm optical communication. The optical receiver consists of a differential photodetector, a differential transimpedance amplifier, three limiting amplifiers and an output circuit. The experiment results show that the receiver achieves an 875 MHz 3 dB bandwidth, and a data rate of 1.5 Gb/s is achieved at a bit-error-rate of 10−9. The chip dissipates 60 mW under a single 3.3 V supply.

CMOS Laser Driver with Analog Pre-distortion Function for TD-LTE System

This paper presents a laser driver with a CMOS analog pre-distortion technique for 4G(TD-LTE) optical fiber communication. The chip is fabricated with the standard 180 CMOS process, including pre-distortion signal generator, source follower, buffer stage, and output current array. This chip uses a novel tunable CMOS analog pre-distortion design, which can control the pre-distortion signal by adjusting the bias circuit voltage. As a result, we can reduce the non-linearity that laser diode introduces into the fiber link, which can greatly reduce the bit-error rate of optical fiber communication. The chip can achieve a pass-band of 10M-4GHz, with 722 x 670 area under a single 1.8V supply. With ADS two-tone harmonic simulation, the design can effectively reduce the third-order intermodulation distortion (IMD3) by 22.7dB.

AlGaN-based solar-blind metal-semiconductor-metal photodetectors

We reported on the fabrication and characterization of AlGaN metal-semiconductor-metal (MSM) photodetectors (PDs). AlGaN epitaxial material with an Al content of 0.6 were grown on sapphire substrates by metalorganic chemical vapor deposition (MOCVD). Schottky contacts were made with Ni/Pt/Au by the way of standard lift-off technique. We measured the performance of PDs. The cutoff wavelength is 276nm. Ultraviolet/visible contrast is about 3 orders of magnitude. The dark current is about 1nA at 1.5V bias and 1µA at 5.3V bias.