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Dive into the research topics where Xuelei Liang is active.

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Featured researches published by Xuelei Liang.


Applied Physics Letters | 2006

Current-voltage characteristics and parameter retrieval of semiconducting nanowires

Zhixiang Zhang; Chuanhong Jin; Xuelei Liang; Qing Chen; L.-M. Peng

Electrical transport measurements were conducted on semiconducting nanowires and three distinct current-voltage (I-V) characteristics were observed, i.e., almost symmetric, almost rectifying, and almost linear. These I-V characteristics were modeled by treating the transport in the nanowire as in a metal-semiconductor-metal structure involving two Schottky barriers and a resistor in between these barriers, and the transport is shown to be dominated by the reverse-biased Schottky barrier under low bias and by the semiconducting nanowire at large bias. In contrast to the conventional Schottky diode, the reverse current in the nano-Schottky barrier structure is not negligible and the current is largely tunneling rather than thermionic. Experimental I-V curves are reproduced very well using our model, and a method for extracting nanowire resistance, electron density, and mobility is proposed and applied to ZnO, CdS, and Bi2S3 nanowires.


Nano Letters | 2012

Extraordinary Control of Terahertz Beam Reflectance in Graphene Electro-absorption Modulators

Berardi Sensale-Rodriguez; Rusen Yan; Subrina Rafique; Mingda Zhu; Wei Li; Xuelei Liang; David J. Gundlach; Vladimir Protasenko; Michelle Kelly; Debdeep Jena; Lei Liu; Huili Grace Xing

We demonstrate a graphene-based electro-absorption modulator achieving extraordinary control of terahertz reflectance. By concentrating the electric field intensity in an active layer of graphene, an extraordinary modulation depth of 64% is achieved while simultaneously exhibiting low insertion loss (∼2 dB), which is remarkable since the active region of the device is atomically thin. This modulator performance, among the best reported to date, indicates the enormous potential of graphene for terahertz reconfigurable optoelectronic devices.


Nano Letters | 2009

Y-Contacted High-Performance n-Type Single-Walled Carbon Nanotube Field-Effect Transistors: Scaling and Comparison with Sc-Contacted Devices

Li Ding; Sheng Wang; Zhiyong Zhang; Qingsheng Zeng; Zhenxing Wang; Tian Pei; Leijing Yang; Xuelei Liang; Jun Shen; Qing Chen; Rongli Cui; Yan Li; Lian-Mao Peng

While it has been shown that scandium (Sc) can be used for making high-quality Ohmic contact to the conduction band of a carbon nanotube (CNT) and thus for fabricating high-performance n-type CNT field effect transistors (FETs), the cost for metal Sc is currently five times more expensive than that for gold and one thousand times more expensive than for yttrium (Y) which in many ways resembles Sc. In this Letter we show that near perfect contacts can be fabricated on single-walled CNTs (SWCNTs) using Y, and the Y-contacted CNT FETs outperform the Sc-contacted CNT FETs in many important aspects. Low-temperature measurements on Y-contacted devices reveal that linear output characteristics persist down to 4.3 K, suggesting that Y makes a perfect Ohmic contact with the conduction band of the CNT. Self-aligned top-gate devices have been fabricated, showing high performance approaching the theoretical limit of CNT-based devices. In particular a room temperature conductance of about 0.55G(0) (with G(0) = 4e(2)/h being the quantum conductance limit of the SWCNT), threshold swing of 73 mV/decade, electron mobility of 5100 cm(2)/V.s, and mean free length of up to 0.639 mum have been achieved. Gate length scaling behavior of the Y-contacted CNT FETs is also investigated, revealing a more favorable energy consumption and faster intrinsic speed scaling than that of the Si-based devices.


Nano Letters | 2008

Self-aligned ballistic n-type single-walled carbon nanotube field-effect transistors with adjustable threshold voltage.

Zhiyong Zhang; Sheng Wang; Li Ding; Xuelei Liang; Tian Pei; Jun Shen; Huilong Xu; Qing Chen; Rongli Cui; Yan Li; Lian-Mao Peng

Near ballistic n-type single-walled carbon nanotube field-effect transistors (SWCNT FETs) have been fabricated with a novel self-aligned gate structure and a channel length of about 120 nm on a SWCNT with a diameter of 1.5 nm. The device shows excellent on- and off-state performance, including high transconductance of up to 25 microS, small subthreshold swing of 100 mV/dec, and gate delay time of 0.86 ps, suggesting that the device can potentially work at THz regime. Quantitative analysis on the electrical characteristics of a long channel device fabricated on the same SWCNT reveals that the SWCNT has a mean-free-path of 191 nm, and the electron mobility of the device reaches 4650 cm(2)/Vs. When benchmarked by the metric CV/ I vs Ion/Ioff, the n-type SWCNT FETs show significantly better off-state leakage than that of the Si-based n-type FETs with similar channel length. An important advantage of this self-aligned gate structure is that any suitable gate materials can be used, and in particular it is shown that the threshold voltage of the self-aligned n-type FETs can be adjusted by selecting gate metals with different work functions.


Nano Letters | 2010

Growth and Performance of Yttrium Oxide as an Ideal High-κ Gate Dielectric for Carbon-Based Electronics

Zhenxing Wang; Huilong Xu; Zhiyong Zhang; Sheng Wang; Li Ding; Qingsheng Zeng; Leijing Yang; Tian Pei; Xuelei Liang; Min Gao; Lian-Mao Peng

High-quality yttrium oxide (Y(2)O(3)) is investigated as an ideal high-kappa gate dielectric for carbon-based electronics through a simple and cheap process. Utilizing the excellent wetting behavior of yttrium on sp(2) carbon framework, ultrathin (about few nm) and uniform Y(2)O(3) layers have been directly grown on the surfaces of carbon nanotube (CNT) and graphene without using noncovalent functionalization layers or introducing large structural distortion and damage. A top-gate CNT field-effect transistor (FET) adopting 5 nm Y(2)O(3) layer as its top-gate dielectric shows excellent device characteristics, including an ideal subthreshold swing of 60 mV/decade (up to the theoretical limit of an ideal FET at room temperature). The high electrical quality Y(2)O(3) dielectric layer has also been integrated into a graphene FET as its top-gate dielectric with a capacitance of up to 1200 nF/cm(2), showing an improvement on the gate efficiency and on state transconductance of over 100 times when compared with that of its back-gate counterpart.


ACS Nano | 2011

Quantum Capacitance Limited Vertical Scaling of Graphene Field-Effect Transistor

Huilong Xu; Zhiyong Zhang; Zhenxing Wang; Sheng Wang; Xuelei Liang; Lian-Mao Peng

A high-quality Y2O3 dielectric layer has been grown directly on graphene and used to fabricated top-gate graphene field-effect transistors (FETs), and the thickness of the dielectric layer has been reduced continuously down to 3.9 nm with an equivalent oxide thickness (EOT) of 1.5 nm and excellent insulativity. By measuring CV characteristics of two graphene FETs with different gate oxide thicknesses, the oxide capacitance and quantum capacitance are retrieved directly from the experimental CV data without introducing any additional fitting process and parameters, yielding a relative dielectric constant of κ=10 for Y2O3 on graphene and an oxide capacitance of about 2.28 μF/cm2. It is found that for a rather large gate voltage range, this oxide capacitance is comparable and sometimes even larger than the quantum capacitance of graphene. Since the total gate capacitance is determined by the smaller of the oxide and quantum capacitance, our results show that not much further improvement can be gained via further vertical scaling down of the gate oxide, suggesting that Y2O3 may be the ultimate dielectric material for graphene. It is also shown that the Y2O3 gate dielectric layer with EOT of 1.5 nm may also satisfy the ultimate lateral scaling requirement on the gate length of graphene FET and be used effectively to control a graphene FET with a gate length as small as 1 nm.


Applied Physics Letters | 2013

Ultraviolet/ozone treatment to reduce metal-graphene contact resistance

Wei Li; Yiran Liang; D. P. Yu; Lian-Mao Peng; Kurt P. Pernstich; Tian Shen; A. R. Hight Walker; Guangjun Cheng; Curt A. Richter; Qiliang Li; David J. Gundlach; Xuelei Liang

We report reduced contact resistance of single-layer graphene devices by using ultraviolet ozone treatment to modify the metal/graphene contact interface. The devices were fabricated from mechanically transferred, chemical vapor deposition grown single layer graphene. Ultraviolet ozone treatment of graphene in the contact regions as defined by photolithography and prior to metal deposition was found to reduce interface contamination originating from incomplete removal of poly(methyl-methacrylate) and photoresist. Our control experiment shows that exposure times up to 10 min did not introduce significant disorder in the graphene as characterized by Raman spectroscopy. By using the described approach, contact resistance of less than 200 Ω μm was achieved for 25 min ultraviolet ozone treatment, while not significantly altering the electrical properties of the graphene channel region of devices.


Nano Letters | 2011

High-performance carbon nanotube light-emitting diodes with asymmetric contacts.

Sheng Wang; Qingsheng Zeng; Leijing Yang; Zhiyong Zhang; Zhenxing Wang; Tian Pei; Li Ding; Xuelei Liang; Min Gao; Yan Li; Lian-Mao Peng

Electroluminescence (EL) measurements are carried out on a two-terminal carbon nanotube (CNT) based light-emitting diode (LED). This two-terminal device is composed of an asymmetrically contacted semiconducting single-walled carbon nanotube (SWCNT). On the one end the SWCNT is contacted with Sc and on the other end with Pd. At large forward bias, with the Sc contact being grounded, electrons can be injected barrier-free into the conduction band of the SWCNT from the Sc contact and holes be injected into the valence band from the Pd electrode. The injected electrons and holes recombine radiatively in the SWCNT channel yielding a narrowly peaked emission peak with a full width at half-maximum of about 30 meV. Detailed EL spectroscopy measurements show that the emission is excitons dominated process, showing little overlap with that associated with the continuum states. The performance of the LED is compared with that based on a three-terminal field-effect transistor (FET) that is fabricated on the same SWCNT. The conversion efficiency of the two-terminal diode is shown to be more than three times higher than that of the FET based device, and the emission peak of the LED is much narrower and operation voltage is lower.


ACS Nano | 2009

Almost Perfectly Symmetric SWCNT-Based CMOS Devices and Scaling

Zhiyong Zhang; Sheng Wang; Zhenxing Wang; Li Ding; Tian Pei; Zhudong Hu; Xuelei Liang; Qing Chen; Yan Li; Lian-Mao Peng

Symmetric n- and p-type field-effect transistors (FETs) have been fabricated on the same undoped single-walled carbon nanotube (SWCNT). The polarity of the FET is defined by controlled injection of electrons (n-type, via Sc electrodes) or holes (p-type, via Pd electrodes) into the SWCNT, instead of via chemically doping the SWCNT. The SWCNT-based FETs with different channel lengths show a clear trend of performance improvement for channel length scaling. Taking full advantage of the perfect symmetric band structure of the semiconductor SWCNT, a perfect SWCNT-based CMOS inverter is demonstrated, which gives a voltage gain of over 160, and for the two adjacent n- and p-type FETs fabricated on the same SWCNT, high field mobility is realized simultaneously for electrons (3000 cm(2)/V.s) and holes (3300 cm(2)/V.s).


Applied Physics Letters | 2008

High-performance n-type carbon nanotube field-effect transistors with estimated sub-10-ps gate delay

Zhikun Zhang; S.Z. Wang; Li-li Ding; Xuelei Liang; Huilong Xu; Jianfei Shen; Qing Chen; Rongli Cui; Yan Li; L.-M. Peng

High-performance top-gated n-type single-walled carbon nanotube (CNT) field-effect transistors (FETs) have been fabricated using scandium contacts and HfO2 gate oxide and are benchmarked against the state-of-the-art n-type Si metal-oxide semiconductor FETs. Two key device metrics, the intrinsic gate-delay (CV∕I) and energy-delay product (CV∕I⋅CV2) per unit width, of the n-type CNT FETs are found to show significant improvement over the Si devices. In particular, the gate-delay time is estimated to be 2.1ps for an n-type CNT FET which is based on a CNT with a diameter of 1.1nm and a channel length of 220nm.

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David J. Gundlach

National Institute of Standards and Technology

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Curt A. Richter

National Institute of Standards and Technology

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