Xunzhao Yin

Emerging Technology-Based Design of Primitives for Hardware Security

Hardware security concerns such as intellectual property (IP) piracy and hardware Trojans have triggered research into circuit protection and malicious logic detection from various design perspectives. In this article, emerging technologies are investigated by leveraging their unique properties for applications in the hardware security domain. Security, for the first time, will be treated as one design metric for emerging nano-architecture. Five example circuit structures including camouflaging gates, polymorphic gates, current/voltage-based circuit protectors, and current-based XOR logic are designed to show the high efficiency of silicon nanowire FETs and graphene SymFET in applications such as circuit protection and IP piracy prevention. Simulation results indicate that highly efficient and secure circuit structures can be achieved via the use of non-CMOS devices.

Using emerging technologies for hardware security beyond PUFs

We discuss how the unique I-V characteristics offered by emerging, post-CMOS transistors can be used to enhance hardware security. Different from most existing work that exploits emerging technologies for hardware security, we (i) focus on transistor characteristics that either do not exist in, or are difficult to duplicate with MOSFETs, and (ii) aim to move beyond hardware implementations of physically unclonable functions (PUFs) and random number generators (RNGs).

Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits

Numerous research efforts are targeting new devices that could continue performance scaling trends associated with Moores Law and/or accomplish computational tasks with less energy. One such device is the ferroelectric FET (FeFET), which offers the potential to be scaled beyond the end of the silicon roadmap as predicted by ITRS. Furthermore, the Ids vs. Vgs characteristics of FeFETs may allow a device to function as both a switch and a non-volatile storage element. We exploit this FeFET property to enable fine-grained logic-in-memory (LiM). We consider three different circuit design styles for FeFET-based LiM: complementary (differential), dynamic current mode, and dynamic logic. Our designs are compared with existing approaches for LiM (i.e., based on magnetic tunnel junctions (MTJs), CMOS, etc.) that afford the same circuit-level functionality. Assuming similar feature sizes, non-volatile FeFET-based LiM circuits are more efficient than functional equivalents based on MTJs when considering metrics such as propagation delay (2.9×, 6.8×) and dyanmic power (3.7×, 2.3×) (for 45 nm, 22 nm technology respectively). Compared to CMOS functional equivalents, FeFET designs still exhibit modest improvements in the aforementioned metrics while also offering non-volatility and reduced device count.

Enhancing Hardware Security with Emerging Transistor Technologies

We consider how the I-V characteristics of emerging transistors (particularly those sponsored by STARnet) might be employed to enhance hardware security. An emphasis of this work is to move beyond hardware implementations of physically unclonable functions (PUFs) and random number generators (RNGs). We highlight how new devices (i) may enable more sophisticated logic obfuscation for IP protection, (ii) could help to prevent fault injection attacks, (iii) prevent differential power analysis in lightweight cryptographic systems, etc.

Design and benchmarking of ferroelectric FET based TCAM

We consider how emerging transistor technologies, specifically ferroelectric field effect transistors (or FeFETs), can realize compact and energy efficient ternary content addressable memories (TCAMs). As Moores Law-based performance scaling trends slow, and many computational tasks of interest are now more data-centric than compute-centric, researchers are looking to improve performance/save energy by integrating efficient and compact logic/processing elements into various levels of the memory hierarchy. Potential benefits include reduced I/O traffic, energy/delay from data transfers, etc. A TCAM is an example of a logic-in-memory element that is ubiquitous in routers, caches, databases, and even neural networks. Not surprisingly, researchers continue to study how emerging technologies could lead to improved TCAMs. Recent work has considered how non-volatile (NV) memory technologies (e.g., resistive random access memory (ReRAM) or magnetic tunnel junctions (MTJs)) could best be used to construct low energy, NV TCAMs. However, acceptable Ron-Roff ratios and the two terminal nature of these devices introduce energy and area overheads. Due to hysteresis in a devices I-V curve, an FeFET-based NV TCAM, offers low area overhead, as well as search energies and search speeds that are superior to other TCAM designs (i.e., based on MTJ, ReRAM and CMOS in array- and architectural-level evaluations.)

Design of latches and flip-flops using emerging tunneling devices

Tunneling field-effect transistors (TFETs) stand out among novel device technologies for low-power circuits and systems. While some TFETs exhibits behavior similar to MOSFETs, a group of emerging tunneling devices including symmetric tunneling FETs (SymFETs) and interlayer tunnel FETs (IFETs) demonstrate a bell-shaped I-V characteristic dissimilar to that of MOSFETs. They have shown the potential for image processing and nontraditional computing in analog applications and the design of Boolean gates with SymFETs has also been explored. This paper uses a SymFET as a proxy to design sequential circuits comprised of devices with bell-shaped I-V characteristics. Said circuits are essential as practically any application requires the indefinite storage of data and control modules during computation. We show that the negative differential resistance (NDR) behavior of SymFET transistors can be employed to build compact and low power latches and flip-flops. The relationship of SymFET with another well-known tunneling device, namely resonant tunneling diode (RTD), is investigated. We illustrate how previous research on RTD-based circuits - such as monostable-bistable (MOBILE) self-latching circuits and highly compact MOBILE-based D flip-flop circuits - can be adopted to SymFETs. Our paper provides a novel path of circuit designs based on devices that have characteristics similar to SymFETs and shows that SymFETs are a promising option for image processing applications in terms of power and area.