Yannick Baumgartner

Highly selective dry etching of GaP in the presence of AlxGa1–xP with a SiCl4/SF6 plasma

We present an inductively coupled-plasma reactive-ion etching process that simultaneously provides both a high etch rate and unprecedented selectivity for gallium phosphide (GaP) in the presence of aluminum gallium phosphide (AlxGa1?xP). Utilizing mixtures of silicon tetrachloride (SiCl4) and sulfur hexafluoride (SF6), selectivities exceeding 2700:1 are achieved at GaP etch rates above 3000?nm min?1. A design of experiments has been employed to investigate the influence of the inductively coupled-plasma power, the chamber pressure, the DC bias and the ratio of SiCl4 to SF6. The process enables the use of thin AlxGa1?xP stop layers even at aluminum contents of a few percent.

First demonstration of 3D SRAM through 3D monolithic integration of InGaAs n-FinFETs on FDSOI Si CMOS with inter-layer contacts

We demonstrate, for the first time, the 3D Monolithic (3DM) integration of In0.53GaAs nFETs on FDSOI Si CMOS featuring short-channel Replacement Metal Gate (RMG) InGaAs n-FinFETs on the top layer and Gate-First Si CMOS on the bottom layer with TiN/W inter-layer contacts. State-of-the-art device integration is achieved with the top layer InGaAs utilizing raised source drain (RSD) and the bottom layer CMOS having Si RSD for nFETs, SiGe RSD for pFETs, implants, silicide and TiN/W plug contacts. The top layer InGaAs n-FinFETs are scaled down to Lg =25 nm and both the Si nFETs and pFETs in the bottom layer are scaled down to Lg ∼15 nm. Finally, utilizing the inter-layer contacts, we demonstrate a densely integrated 3D 6T-SRAM circuit with InGaAs nFETs stacked on top of Si pFETs showing considerable area reduction with respect to a 2D layout.

Monolithic integration of InAlAs/InGaAs quantum-well on InP-OI micro-substrates on Si for infrared light sources

We demonstrate for the first time that InAlAs/InGaAs QW can be selectively grown on micron-sized InP-OI substrates, obtained by selective epitaxy in empty oxide cavities on Si. The concept, material and optical characterizations are presented, paving the way towards integrated light sources for infrared applications.

Towards electro-optical integration of hybrid III-V on Si lasers into the BEOL of a CMOS technology

Interconnects have become a severe bottleneck in todays computing hardware [1]. For large-scale data centers in particular, the interconnect situation is even more severe [2]. The interconnect bandwidth and bandwidth density have to be increased on all system-levels. The ideal technology to increase the density is Si photonics (SiPh). While the integration of most of the SiPh components has been mastered already on a 90 nm CMOS platform [3], the integration of III-V materials to yield directly-modulated lasers still poses a major challenge. This integration is considered as the cornerstone for reaching a complete, yet cost-competitive, SiPh-CMOS marriage. Most concepts shown so far [4, 5] either lack CMOS-compatibility or have device dimensions that hinder the integration of the laser into a standard BEOL. To allow for a common BEOL between SiPh and CMOS, we integrate the III-V material between the FEOL and BEOL, within the first interlayer dielectric ILD0 (Fig. 1). Such integration imposes tight requirements on device dimensions as well as several technological challenges that have to be mastered. We report here on decisive aspects of such integration. This represents a major step towards a full integration of III-V, SiPh and CMOS.

Optomechanics with one-dimensional gallium phosphide photonic crystal cavities

We present the first investigation of optomechanics in an integrated one-dimensional gallium phosphide (GaP) photonic crystal cavity. The devices are fabricated with a newly developed process flow for integration of GaP devices on silicon dioxide (SiO2) involving direct wafer bonding of an epitaxial GaP/AlxGa1-xP/GaP heterostructure onto an oxidized silicon wafer. Device designs are transferred into the top GaP layer by inductively-coupled-plasma reactive ion etching and made freestanding by removal of the underlying SiO2. Finite-element simulations of the photonic crystal cavities predict optical quality factors greater than 106 at a design wavelength of 1550 nm and optomechanical coupling rates as high as 900 kHz for the mechanical breathing mode localized in the center of the photonic crystal cavity. The first fabricated devices exhibit optical quality factors as high as 6.5 × 104, and the mechanical breathing mode is found to have a vacuum coupling rate of 200 kHz at a frequency of 2.59 GHz. These results, combined with low two-photon absorption at telecommunication wavelengths and piezoelectric behavior, make GaP a promising material for the development of future nanophotonic devices in which optical and mechanical modes as well as high-frequency electrical signals interact.

Microcavity III-V lasers monolithically grown on silicon

We will present our recent work on III-V micro-cavity lasers monolithically grown on silicon substrates. The III-V material is directly grown using Template-Assisted-Selective-Epitaxy (TASE) within oxide cavities patterned using conventional lithographic techniques on top of the silicon substrate. This allows for the local integration of single-crystal III-V active gain material. Two variations of this technique will be discussed; the direct growth of disc lasers and the two-step approach via a virtual substrate. Room temperature single-mode optically pumped lasing is achieved in GaAs micro-cavity lasers, and devices show a remarkably low shift of the lasing threshold (T0=170K) with temperature. Dependence on cavity geometry and pump power will be discussed.

CMOS-embedded lasers for advanced silicon photonic devices

Realizing CMOS-compatible integrated lasers on silicon is a crucial step towards cost-efficient, high-functional optoelectronic integrated circuits (OEICs). Here, we report on a concept to embed active optical devices based on a bonded III–V epitaxial layer stack between the FEOL and BEOL of a CMOS silicon photonics chip. Ultra-shallow laser devices are realized with this concept and optically-pumped lasing, coupled to silicon is demonstrated for the first time with such a concept.

Monolithic integration of III-V nanostructures for electronic and photonic applications

We have recently developed a novel III-V integration scheme, where III-V material is grown directly on top of Si within oxide nanotubes or microcavities which control the geometry of nanostructures. This allows us to grow III-V material non-lattice matched on any crystalline orientation of Si, to grow arbitrary shapes as well as abrupt heterojunctions, and to gain more flexibility in tuning of composition. In this talk, applications for electronic devices such as heterojunction tunnel FETs and microcavity III-V lasers monolithically integrated on Si will be discussed along with an outlook for the future.