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Dive into the research topics where Daniele Caimi is active.

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Featured researches published by Daniele Caimi.


Nature Communications | 2013

A strong electro-optically active lead-free ferroelectric integrated on silicon

Stefan Abel; Thilo Stöferle; Chiara Marchiori; C. Rossel; Marta D. Rossell; Rolf Erni; Daniele Caimi; Marilyne Sousa; Alexei Chelnokov; Bert Jan Offrein; Jean Fompeyrine

The development of silicon photonics could greatly benefit from the linear electro-optical properties, absent in bulk silicon, of ferroelectric oxides, as a novel way to seamlessly connect the electrical and optical domain. Of all oxides, barium titanate exhibits one of the largest linear electro-optical coefficients, which has however not yet been explored for thin films on silicon. Here we report on the electro-optical properties of thin barium titanate films epitaxially grown on silicon substrates. We extract a large effective Pockels coefficient of r(eff) = 148 pm V(-1), which is five times larger than in the current standard material for electro-optical devices, lithium niobate. We also reveal the tensor nature of the electro-optical properties, as necessary for properly designing future devices, and furthermore unambiguously demonstrate the presence of ferroelectricity. The integration of electro-optical active films on silicon could pave the way towards power-efficient, ultra-compact integrated devices, such as modulators, tuning elements and bistable switches.


Applied Physics Letters | 2006

Field-effect transistors with SrHfO3 as gate oxide

C. Rossel; B Mereu; Chiara Marchiori; Daniele Caimi; Marilyne Sousa; A Guiller; Heinz Siegwart; R Germann; Jean-Pierre Locquet; Jean Fompeyrine; David J. Webb; Ch Dieker; Jin Won Seo

The authors demonstrate that the compound SrHfO3 grown epitaxially on Si(100) by molecular-beam epitaxy is a potential gate dielectric to fabricate n- and p-metal-oxide semiconductor field-effect transistors with equivalent oxide thickness (EOT) below 1nm. The electrical properties on capacitors and transistors show low gate leakage and good capacitance and I-V output characteristics. The lower electron and hole mobilities, which are strongly limited by charge trapping, nevertheless fit well with the general trend of channel mobility reduction with decreasing EOT.


Journal of Applied Physics | 2007

Optical properties of epitaxial SrHfO3 thin films grown on Si

Marilyne Sousa; C. Rossel; Chiara Marchiori; Heinz Siegwart; Daniele Caimi; Jean-Pierre Locquet; David J. Webb; R Germann; Jean Fompeyrine; K Babich; Jin Won Seo; Ch Dieker

The perovskite SrHfO3 can be a potential candidate among the high-permittivity materials for gate oxide replacement in future metal-oxide semiconductor field-effect transistor technology. Thin films of SrHfO3 were grown by molecular beam epitaxy and compared with SrTiO3 films. Their optical properties were investigated using spectroscopic ellipsometry and analyzed with respect to their structural properties characterized by x-ray diffractometry, atomic force microscopy, and transmission electron microscopy. A band gap of Eg=6.1±0.1eV is measured optically, which renders this material better suited for gate dielectric applications than SrTiO3 with Eg∼3.4eV. At similar equivalent oxide thickness, SrHfO3 also exhibits lower gate leakage current than SrTiO3 does.


international electron devices meeting | 2012

An integration path for gate-first UTB III-V-on-insulator MOSFETs with silicon, using direct wafer bonding and donor wafer recycling

Lukas Czornomaz; N. Daix; Daniele Caimi; Marilyne Sousa; Rolf Erni; Marta D. Rossell; M. El-Kazzi; C. Rossel; Chiara Marchiori; Emanuele Uccelli; M. Richter; Heinz Siegwart; Jean Fompeyrine

In this work we demonstrate for the first time that the excellent thermal stability of ultra-thin body (UTB) III-V heterostructures on silicon provides a path for the cointegration of self-aligned In0.53Ga0.47As MOSFETs with silicon. We first demonstrate that the transfer of high-quality InGaAs / InAlAs heterostructures (tch <; 10 nm) can be achieved by direct wafer bonding and hydrogen-induced thermal splitting, and that the donor wafer can be recycled for a cost-effective process. The thermal stability of the bonded layer enables to integrate UTB III-V MOSFETs at 500 nm pitch using a gate-first flow featuring raised source/drain (S/D) grown at 600oC. The expected benefit of an UTB structure is benchmarked by comparing sub-threshold slope (SS) and drain-induced-barrier-lowering (DIBL) against state-of-the-art III-V-o-I or Tri-Gate FET data.


Journal of Applied Physics | 2006

Solid phase epitaxy of SrTiO3 on (Ba,Sr)O∕Si(100): The relationship between oxygen stoichiometry and interface stability

Gerd Norga; Chiara Marchiori; C. Rossel; A Guiller; Jean-Pierre Locquet; Heinz Siegwart; Daniele Caimi; Jean Fompeyrine; Jin Won Seo; Ch Dieker

Key aspects of the growth process of epitaxial SrTiO3 with crystalline interface on silicon are outlined. An important step in this process is the solid phase epitaxy in ultrahigh vacuum of amorphous SrTiO3 on top of a few monolayer thick, low-temperature grown, epitaxial (Ba,Sr)O∕Si(100) template. Insufficient oxygen supply during the SrTiO3 deposition step causes the formation of amorphous alkaline-earth silicates and TiSix at the Si∕epitaxial oxide interface during ultrahigh vacuum annealing. Performing SrTiO3 deposition in excess O2, this interfacial reaction is suppressed, and a metal-insulator-semiconductor capacitance equivalent to 0.5nm of SiO2 is obtained for a 10unit cell SrTiO3∕1unit cell (Ba,Sr)O∕p‐Si(100) stack.


international electron devices meeting | 2013

Co-integration of InGaAs n- and SiGe p-MOSFETs into digital CMOS circuits using hybrid dual-channel ETXOI substrates

Lukas Czornomaz; N. Daix; Kangguo Cheng; Daniele Caimi; C. Rossel; K. Lister; Marilyne Sousa; Jean Fompeyrine

We demonstrate for the first time a dense co-integration of co-planar nano-scaled SiGe p-FETs and InGaAs n-FETs. This result is based on hybrid substrates containing extremely-thin SiGe and InGaAs layers on insulators (ETXOI). We first show that such hybrid substrates can be fabricated by direct wafer bonding with stacked high-mobility layers thinner than 8nm. A process flow is presented that allows us to fabricate n- and p-channel field effect transistors with ultra-thin body and BOX (UTBB-FET) on the same wafer. Gate lengths down to 40nm produced at sub-μm gate-pitch are achieved. Working CMOS inverters are obtained using a common front-end which confirms the viability of this integration scheme for hybrid high-mobility dual-channel CMOS. We also highlight that back-biasing technique for Vt tuning can still be used despite the dualchannel structure, as implemented in standard ETSOI circuits.


Nanotechnology | 2013

Controlling tetragonality and crystalline orientation in BaTiO3 nano-layers grown on Si

Stefan Abel; Marilyne Sousa; C. Rossel; Daniele Caimi; Marta D. Rossell; Rolf Erni; Jean Fompeyrine; Chiara Marchiori

A hybrid growth process was developed in order to epitaxially integrate nano-layers of the multi-functional perovskite BaTiO₃ onto Si(001) substrates. In particular, we combined molecular beam epitaxy (MBE) with radio-frequency sputtering. Due to its strong influence on the functional properties, the crystalline structure of the layers was thoroughly investigated throughout our study. MBE-grown seed layers are tetragonal and c-axis oriented up to a thickness of 20 nm. A transition into a-axis films is visible for thicker layers. When the seed layer thickness exceeds 6 nm, subsequently sputtered BaTiO₃ films are epitaxial. However, their crystalline structure, their orientation with respect to the substrate, and their morphology are strongly dependent on the deposition and post-deposition thermal budget. Consistently with their crystalline symmetry, thin MBE BaTiO₃ films are piezo- and ferroelectric with a spontaneous polarization perpendicular to the surface. Also for thick films, the functional response, as determined via piezo-force microscopy, is in good agreement with the structural properties.


Applied Physics Letters | 2005

Phase of reflection high-energy electron diffraction oscillations during (Ba,Sr)O epitaxy on Si(100): A marker of Sr barrier integrity

G Norga; Chiara Marchiori; A Guiller; Jean-Pierre Locquet; C. Rossel; Heinz Siegwart; Daniele Caimi; Jean Fompeyrine; Thierry Conard

We use the reflection high-energy electron diffraction oscillation phase shift to monitor the stability of the Sr barrier, prepared by exposure of Si(100) to Sr at high temperatures, in situ during molecular beam epitaxy growth of (Ba,Sr)O on Si(100). Our results confirm that the deposition of additional metallic Sr at low temperature is essential for preventing the incorporation of the Sr termination layer in the (Ba,Sr)O layer during its growth, and for obtaining monolayer thin (Ba,Sr)O layers with good crystallinity and minimal density of interfacial Si–O bonds on Si(100).


Applied Physics Letters | 2005

Enhanced feedback in organic photonic-crystal lasers

Rik Harbers; Patric Strasser; Daniele Caimi; Rainer F. Mahrt; Nikolaj Moll; Bert Jan Offrein; Daniel Erni; Werner Bächtold; Ullrich Scherf

The mode coupling of organic lasers is greatly enhanced by a photonic crystal that consists of a thin layer of titanium dioxide (TiO2) with a rectangular lattice of holes. The use of TiO2 increases the index contrast in the photonic crystal as well as the confinement in the waveguide, which results in larger feedback given to the lasing modes. This in turn leads to lower thresholds and much smaller devices. Vertically emitting laser devices have been fabricated according to optimized parameters, and the spectral features measured are in excellent agreement with simulations. The devices feature a three to five times lower threshold than devices whose feedback structure is etched directly into the fused silica substrate.


symposium on vlsi technology | 2015

An InGaAs on Si platform for CMOS with 200 mm InGaAs-OI substrate, gate-first, replacement gate planar and FinFETs down to 120 nm contact pitch

V. Djara; V. Deshpande; Emanuele Uccelli; N. Daix; Daniele Caimi; C. Rossel; Marilyne Sousa; Heinz Siegwart; Chiara Marchiori; J.M. Hartmann; K.-T. Shiu; C.-W. Weng; M. Krishnan; Michael F. Lofaro; R. Steiner; Devendra K. Sadana; D. Lubyshev; A. Liu; Lukas Czornomaz; Jean Fompeyrine

We report on the first demonstration of ultra-thin body (50 nm), low defectivity 200 mm InGaAs-on-insulator (-OI) fabricated by direct wafer bonding technique (DWB) as well as a replacement gate process for self-aligned fully depleted InGaAs MOSFETs. These combined achievements highlight the viability of our approach for the VLSI integration of InGaAs at advanced nodes. Short channel replacement gate (RMG) and Gate-first (GF) FETs are reported for the first time using InGaAs-OI wafers with a 120nm contact-to-contact pitch. Record ION (118 μA/μm) at fixed operating voltage of 0.5V for InGaAs devices on Si is achieved on 50-nm-Lg RMG FinFETs. Both schemes feature highly scaled fins (down to 15 nm). Compared to a GF integration flow, RMG devices exhibit better Ion and DIBL characteristics. We also demonstrate FETs with 70 nm contacts and 120 nm pitch achieving high-ION.

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