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Dive into the research topics where Yao-Hsin Chou is active.

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Featured researches published by Yao-Hsin Chou.


design automation conference | 2009

An O(n log n) path-based obstacle-avoiding algorithm for rectilinear Steiner tree construction

Chih-Hung Liu; Shih-Yi Yuan; Sy-Yen Kuo; Yao-Hsin Chou

For the obstacle-avoiding rectilinear Steiner minimal tree problem, this paper presents an O(n log n)-time algorithm with theoretical optimality guarantees on a number of specific cases, which required O(n3) time in previous works. We propose a new framework to directly generate O(n) critical paths as essential solution components, and prove that those paths guarantee the existence of desirable solutions. The path-based framework neither generates invalid initial solutions nor constructs connected routing graphs, and thus provides a new way to deal with the OARSMT problem. Experimental results show that our algorithm achieves the best speed performance, while the average wirelength of the resulting solutions is only 1.1% longer than that of the best existing solutions.


international symposium on physical design | 2008

Efficient multilayer routing based on obstacle-avoiding preferred direction steiner tree

Ching-Hung Liu; Yao-Hsin Chou; Shin-Yi Yuan; Sy-Yen Kuo

In IC design, rectilinear Steiner trees have been used to route signal nets by global and detail routers for a long time. Recently, there are more complicated processing conditions for routing to be considered, such as multiple routing layers, obstacles, and preferred directions. Furthermore, routability is also an important issue for modern routing which handles more than ten thousand signal nets. As a result, how to meet the processing conditions and consider the routability at the same time is becoming important. In this paper, we formulate a routing problem, called the obstacle-avoiding preferred direction Steiner tree (OAPDST) problem, which can deal with more practical processing conditions and achieve acceptable routability. To the best of our knowledge, this is the first attempt to formulate this problem. Then, we propose a routing graph, called preferred direction evading graph (PDEG), for this problem, and prove that at least one optimal solution can be found on PDEG. As a result, by using PDEG as the solution space, more efficient and effective methods can be found for the OAPDST problem. Based on PDEG, we also construct an approximation algorithm for the OAPDST problem to provide stable and effective solutions. Experimental results show that our method can perform well for the OAPDST problem


IEEE Transactions on Nanotechnology | 2008

Quantum Boolean Circuits are 1-Testable

Yao-Hsin Chou; I-Ming Tsai; Sy-Yen Kuo

Recently, a systematic procedure was proposed to derive a minimum input quantum circuit for any given classical logic with the generalized quantum Toffoli gate, which is universal in Boolean logic. Since quantum Boolean circuits are reversible, we can apply this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this paper, we use Hadamard and general controlled-controlled not gates to make QILA 1-testable. That is, for any quantum Boolean circuit, the number of test patterns is independent of both the size of the array and the length of the inputs.


vlsi test symposium | 2008

QBIST: Quantum Built-in Self-Test for any Boolean Circuit

Yao-Hsin Chou; Sy-Yen Kuo; I-Ming Tsai

A systematic procedure was proposed to derive a minimum space quantum circuit for any given classical logic with the generalized quantum Toffoli gate which is universal in Boolean logic. Since quantum computation is reversible, we can apply this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this paper, we use Hadamard and general CCN gates to make QILA 1-testable. That is, for any quantum Boolean circuit, the number of test patterns is independent of both the size of the array and the length of the inputs. This property can be applied to perform the quantum built-in self-test (QBIST), which makes any Boolean circuit 1-testable.


international conference on nanotechnology | 2007

Quantum boolean circuit is 1-testable

Yao-Hsin Chou; I-Ming Tsai; Sy-Yen Kuo

Recently, a systematic procedure is proposed to derive a minimum space quantum circuit for a given classical logic with the generalized quantum Toffoli gate which is universal in classical boolean logic. Since quantum computation is reversible, we can use this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this paper, we apply Hadamard and general CCN gates on QILA circuits to make them 1-testable. As a result, for quantum boolean circuits, the number of test patterns is independent of both the size of the array and the length of the inputs.


international conference on nanotechnology | 2007

Improving the network flow problem using quantum search

Chia-Mu Yu; I-Ming Tsai; Yao-Hsin Chou; Sy-Yen Kuo

Maximum flow problem has many applications in the engineering community. In this paper, we propose a quantum algorithm to solve the maximum flow problem in O(n 2.5) time, which, to the best of our knowledge, is faster than all other classical and quantum algorithms.


international conference on nanotechnology | 2006

Quantum Entanglement and Its Applications on Secure Computation

Yao-Hsin Chou; I-Ming Tsai; Sy-Yen Kuo

In this paper, we demonstrate that nanoscale phenomenon can be applied not only in device level but also in high layer applications, such as secure computation. We study the possibility of performing secure computation based on quantum entanglement, which is a phenomenon available only at the nanometer scale. Comparing with classical secure computation algorithms, the security of this protocol is based on physical laws, instead of any unproven mathematic conjecture.


2007 First International Conference on Quantum, Nano, and Micro Technologies (ICQNM'07) | 2007

Quantum Entanglement, Non-Locality and Secure Computation

Yao-Hsin Chou; I-Ming Tsai; Chin-Shyurng Fahn; Shi-Jinn Horng; Sy-Yen Kuo

In this paper, we demonstrate that nanoscale phenomenon can be applied not only in device level but also in high layer applications, such as secure computation. We study the possibility of performing secure computation by building non-local machines based on quantum entanglement and non-locality, which are phenomena available only at the nanometer scale. Comparing with classical secure computation algorithms, the security of this protocol is based on physical laws, instead of any unproven mathematic conjecture.


pacific rim international symposium on dependable computing | 2006

Quantum Oblivious Transfer and Fair Digital Transactions

Yao-Hsin Chou; I-Ming Tsai; Chien-Ming Ko; Sy-Yen Kuo; Ing-Yi Chen

Quantum entanglement is a phenomenon available only at nanometer scale. In this paper, we show how quantum entanglement can be used to build cryptographic primitives such as oblivious transfer. In addition to studying the protocol itself, we also show how to realize some applications based on our proposal. These include typical e-business applications such as contract signing, certified mail, simultaneous secret exchange, secure transaction and remote coin flip. Unlike classical oblivious transfer, the security of this protocol is based on physical laws, instead of any unproven mathematic conjecture. As a result, our proposal provides unconditional security for e-business


Quantum Information & Computation | 2009

Quantum direct communication with mutual authentication

Cheng-An Yen; Shi-Jinn Horng; Hsi-Sheng Goan; Tzong-Wann Kao; Yao-Hsin Chou

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Sy-Yen Kuo

National Taiwan University

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I-Ming Tsai

National Taiwan University

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Shi-Jinn Horng

National Taiwan University of Science and Technology

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Chin-Shyurng Fahn

National Taiwan University of Science and Technology

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Cheng-An Yen

National Taiwan University of Science and Technology

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Chia-Mu Yu

National Taiwan University

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Chien-Ming Ko

National Taiwan University

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Ching-Hung Liu

National Taiwan University

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Hsi-Sheng Goan

National Taiwan University

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Ing-Yi Chen

National Taipei University of Technology

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