Yasmin Halawani

Modeling and Optimization of Memristor and STT-RAM-Based Memory for Low-Power Applications

Conventional charge-based memory usage in low-power applications is facing major challenges. Some of these challenges are leakage current for static random access memory (SRAM) and dynamic random access memory (DRAM), additional refresh operation for DRAM, and high programming voltage for Flash. In this paper, two emerging resistive random access memory (ReRAM) technologies are investigated, memristor and spin-transfer torque (STT)-RAM, as potential universal memory candidates to replace traditional ones. Both of these nonvolatile memories support zero leakage and low-voltage operation during read access, which makes them ideal for devices with long sleep time. To date, high write energy for both memristor and STT-RAM is one of the major inhibitors for adopting the technologies. The primary contribution of this paper is centered on addressing the high write energy issue by trading off retention time with noise margin. In doing so, the memristor and STT-RAM power has been compared with the traditional six-transistor-SRAM-based memory power and potential application in wireless sensor nodes is explored. This paper uses 45-nm foundry process technology data for SRAM and physics-based mathematical models derived from real devices for memristor and STT-RAM. The simulations are conducted using MATLAB and the results show a potential power savings of 87% and 77% when using memristor and STT-RAM, respectively, at 1% duty cycle.

Memory impact on the lifetime of a Wireless Sensor Node using a Semi-Markov model

The increase in demand for higher functionality, smaller size, lower cost and near perpetual operation of Wireless Sensor Nodes (WSNs) are posing big challenges for system designers. A major aspect is the operational lifetime of the system which is determined by the finite energy source supplied by the battery. In WSNs, the higher power incurred due to added system functionality and the increase leakage as a result of technology scaling have high impact on the battery lifetime. In this work, memory was used to further exploit the energy efficiency at the sensor node system-level. A detailed analysis using Semi-Markov model to investigate different operational modes of WSN with the present SRAM shows an improvement of 4x at 90% duty cycle in the nodes lifetime. In addition, an emerging non-volatile memory (NVM) technology, Memristor, is also explored to further improve the WSN energy efficiency. Its non-volatility nature will suppress the power wasted as leakage in SRAM during idle periods which is typical for low duty-cycle WSNs. The results show that utilizing an on-chip NVM can further improve WSN lifetime by 1x for low activity μW range sensor nodes.

Efficient power management in wireless sensor networks

Wireless sensor networks (WSN) are used extensively to monitor a wide range of physical and environmental parameters. The collected data can then be used to make various decisions and control actions. The individual sensors nodes of a WSN typically consist of a processor, sensors, and transceiver. As the monitoring device of WSN is increasingly mobile, the need for efficient power management (PM) techniques is becoming crucial in order to extend the life of the battery.

Modeling of STT-MTJ for low power embedded memory applications: A comparative review

Spin Transfer Torque RAM (STT-RAM) has emerged as a potential candidate for universal memory. The lack of comprehensive electrical modeling for the device is hindering the adaption and design space exploration of the device. In this paper, we investigate the existing models of Spin Transfer Torque - Magnetic Tunnel Junction (STT-MTJ) along with the different implementation tools available (Spice, Verilog-A, Micro-Magnetic Simulator). The study will select the model which most resembles the devices physical parameters including static and dynamic stochastic intrinsic properties. In addition, the selected model is used to investigate several design techniques that can improve power reduction for embedded applications.

Embedded memory design using memristor: Retention time versus write energy

Memristor is a good candidate for replacing CMOS-based flash and DRAM due to its superior scalability, low read energy and non-volatility characteristics. Relatively longer write time and high write energy are the main obstacles in the way of adapting memristor for on-chip memory to replace SRAM. The off-to-on resistance ratio for memristor are in excess of 1000x which provides adequate noise margin to separate the on versus off states. In this paper, we explore the design space of memristor by studying retention time, write time, write energy, and noise margin ratio. Our results show that by reducing target retention time both write time and energy can be reduced to a competitive level. In addition, reducing the noise margin reduces both the write time and energy. Our study shows that by reducing retention time to about 4 years write energy can be reduced to 0.1pJ. Compared to SRAM power consumed is 88.6% less for 128KB memory array. Since on-chip memory is not expected to retain data for long time (Jog et al., 2011), our proposed approach can be used in many energy critical applications and is able to reduce system complexity especially power management unit.

Memristor for energy efficient wireless sensor node

Wireless sensor nodes (WSN) are used extensively to monitor a wide range of physical and environmental parameters. Data acquisition, processing, storage and transmission are mandatory requirements for different applications. These nodes are expected to generate a correct representation of the sensed quantities, which is then used to make various decisions and control actions. This means that the node requires more memory capabilities to store data either temporary or permanently. The collected data can then be used. As the monitoring device of WSN is increasingly mobile, the need for efficient power management (PM) techniques is becoming crucial in order to extend the lifetime of the battery-powered device. Energy is a critical performance metric in WSNs. Challenges facing WSN designers range from computational energy, energy consumption, energy source, communication channels, etc. A new emerging memory technology like memristor provides a good candidate for WSN PM. Memristor non-volatility features coupled with small size and low energy operation provide a normally-off instant-on mode of operation for the WSN; this will minimize the loss of energy to leakage power. The paper gives an insight about using memristor in a PM scheme at the system level.

Memristors for digital, memory and neuromorphic circuits

The Memristor, as the newly discovered fourth circuit element, is being used in many applications such as memory and digital circuits, as well as neuromorphic systems. The unique characteristics of the memristor: retaining its resistance state, ability to behave as a switch and consequently the possibility to be used in both memory and digital circuits. Its resistance can also change gradually allowing the potential of mimicking neural chemical synapses. These applications of the memristor will be reviewed and discussed using a nonlinear mathematical model of physical bipolar memristor devices.