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Dive into the research topics where Yasuhiro Morinaka is active.

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Featured researches published by Yasuhiro Morinaka.


24th International Congress on High-Speed Photography and Photonics | 2001

High-speed high-resolution epifluorescence imaging system using CCD sensor and digital storage for neurobiological research

Ichiro Takashima; Riichi Kajiwara; Kiyo Murano; Toshio Iijima; Yasuhiro Morinaka; Hiroyoshi Komobuchi

We have designed and built a high-speed CCD imaging system for monitoring neural activity in an exposed animal cortex stained with a voltage-sensitive dye. Two types of custom-made CCD sensors were developed for this system. The type I chip has a resolution of 2664 (H) X 1200 (V) pixels and a wide imaging area of 28.1 X 13.8 mm, while the type II chip has 1776 X 1626 pixels and an active imaging area of 20.4 X 18.7 mm. The CCD arrays were constructed with multiple output amplifiers in order to accelerate the readout rate. The two chips were divided into either 24 (I) or 16 (II) distinct areas that were driven in parallel. The parallel CCD outputs were digitized by 12-bit A/D converters and then stored in the frame memory. The frame memory was constructed with synchronous DRAM modules, which provided a capacity of 128 MB per channel. On-chip and on-memory binning methods were incorporated into the system, e.g., this enabled us to capture 444 X 200 pixel-images for periods of 36 seconds at a rate of 500 frames/second. This system was successfully used to visualize neural activity in the cortices of rats, guinea pigs, and monkeys.


24th International Congress on High-Speed Photography and Photonics | 2001

8-channel parallel readout high-speed wide dynamic range CCD

Yasuhiro Morinaka; Hiroyoshi Komobuchi

An 8 channel parallel readout CCD image sensor for high-speed imaging has been developed. The image area of this sensor is divided into 8 rectangular blocks, and the data of each block is read out through an independent amplifier. In the area where there is not photediode (PD) beside VCCD, the space of VCCDs is narrowed down to a HCCD block that is placed at the end of VCCDs, and amplifiers and their peripheral circuits are placed between the spaces of two HCCD blocks with parallel to makes amplifier properties uniform across channels. For VCCD high-speed transfer, VCCD bus line structure is used and VCCD slant structure is optimized by the computer 3D simulation. The pixel size is designed to be 11.5 micrometers X 11.5 micrometers , and amplifiers are placed close to FDA (Floating Diffusion Amplifier) with VCCD slant structure, which realized high sensitivity and large saturation.


Archive | 2004

Article control system, article control server, article control method

Satoshi Sato; Shusaku Okamoto; Masamichi Nakagawa; Kunio Nobori; Osamu Yamada; Tomonobu Naruoka; Yoshihiko Matsukawa; Yasuhiro Morinaka; Katsuji Aoki; Mikiya Nakata


Archive | 2002

Imaging device and signal processing method therefor

Yasuhiro Morinaka; Hiroyoshi Komobuchi; Akito Kidera; Toshiya Fujii


Archive | 2000

Imaging device with vertical charge transfer paths having appropriate lengths and/or vent portions

Yasuhiro Morinaka; Hiroyoshi Komobuchi; Takumi Yamaguchi; Sei Suzuki


Archive | 2002

Ccd solid-state imaging element and camera system using the same

Hiroto Kobuchi; Yasuhiro Morinaka; Takumi Yamaguchi; 山口 琢己; 森中 康弘; 菰淵 寛仁


Archive | 2002

Solid-state image pickup apparatus and method for driving the same

Hiroyoshi Komobuchi; Yasuhiro Morinaka; Toshiya Fujii; Kazuyuki Inokuma


Archive | 2002

Image sensing apparatus and signal processing method therefor

Yasuhiro Morinaka; Hiroyoshi Komobuchi; Akito Kidera; Toshiya Fujii


Archive | 2009

Article control system and article control server

Satoshi Sato; Shusaku Okamoto; Masamichi Nakagawa; Kunio Nobori; Osamu Yamada; Tomonobu Naruoka; Yoshihiko Matsukawa; Yasuhiro Morinaka; Katsuji Aoki; Mikiya Nakata


Archive | 2002

Solid camera device and driving method thereof

Kanjin Komofuchi; Yasuhiro Morinaka; Toshiya Fujii

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