Yasuhiro Yoshii

Pattern Freezing Process Free Litho-Litho-Etch Double Patterning

Double patterning based on existing ArF immersion lithography is considered the most viable option for 32nm and below CMOS node. Most of double patterning approaches previously described require intermediate process steps like as hard mask etching, spacer material deposition, and resist freezing. These additional steps can significantly add to the cost of production applied the double patterning. In this paper, pattern freezing free litho-litho-etch double patterning process is investigated to achieve a narrow pitch imaging without the intermediate processing steps. Pattern freezing free litho-litho-etch double patterning utilizing positive-positive resist combination demonstrated composite pattern generation.