Yasushi Gotoh

A semi-static complementary gain cell technology for sub-1 V supply DRAM's

A new semi-static complementary gain cell for future low power DRAMs has been proposed and experimentally demonstrated. This gain cell consists of a write-transistor and its opposite conduction type read-transistor with a heating gate as a storage node which causes a shift in the threshold voltage. This gain cell provides a two orders of magnitude larger cell signal output and higher immunity to noise on the bitlines when compared with a conventional one-transistor DRAM cell without increasing the storage capacitance even at a supply voltage of 0.8 V. The 0.87 /spl mu/m/sup 2/ cell size is achieved by using a 0.25 /spl mu/m design rule with a polysilicon thin-film transistor built in the trench and phase shifted i-line lithography. >

Analysis of polymer formation during SiO2 microwave plasma etching

The mechanism of C x F y fluorocarbon deposition during SiO2 etching is analyzed using a test sample with an overhang mask. For C 4 F 8 , CHF 3 , and CH 2 F 2 , only C x F y deposition was observed at 0 W of substrate-bias rf power, and the deposition profiles were similar. At a higher rf power, reaction phenomena changed to those of SiO2 etching. The standard deviation σ of the etching-ion incident angle was measured as less than 2°. On the other hand, σ depo measured from the deposition profile was about 20°. This difference may be caused by surface migration. This migration is thought to be a key factor in excess deposition at the bottom of a high-aspect-ratio hole. Etching rates of the deposit increased in the order of C 4 F 8 >CHF 3 > CH 2 F 2 . Therefore, SiO 2 -etching gases, such as C 4 F 8 , which form easily removable deposits, reduce RIE lags for contact hole patterning.

Estimation of Ion Incident Angle from Si Etching Profiles

The distribution of angles of incident etching ions was measured using a test sample having an overhanging mask structure. The standard deviation of ion incident angles decreased with decreasing pressure of the etching atmosphere. With conventional reactive ion etchers, standard deviations of 3 to 8° were measured at pressures from 2.6 to 101 Pa. With a microwave plasma etcher, the measured deviation at 1.3 Pa was 2°. The aspect-ratio dependence of etching with SF6 may be caused by the insufficient radical supply, which becomes the rate-determining step for etching a high-aspect-ratio trench.

Recent advances of interconnection technologies using anisotropic conductive films

Anisotropic conductive films(ACFs) consists of conducting particles and adhesive resins and have been widely used for packaging technologies in FPDs(Flat panel displays) such as LCDs(Liquid crystal displays) for last decades. So far various packaging technologies such as TCP(Tape carrier package) on LCD panel or PWB(Printed wiring board), COF(Chip on flex) on LCD panel or PWB and COG(Chip on Glass) using ACFs have been realized to meet the requirement of fine pitch capability and make the flat panel displays smaller, lighter and thinner. In order to meet the requirement of finer pitch interconnection of outer lead of TCP in LCD packaging technologies, the influence of conducting particles on contact resistance of ACF joints was investigated. It was found that the 50 micron pitch of outer lead interconnection of TCP is realized by optimizing the hardness of conducting particles. In addition, to meet fine pitch capability smaller than 50 micron pitch, the improvement of the adhesion characteristics against COF has been demonstrated in outer lead interconnection. It was confirmed that making conducting particles smaller is advantageous for the driver IC with small bump size and space in COG. Low temperature curable ACF using new curing system which cross-links at 140 degrees C in 10 sec bonding has been demonstrated in TCP/PWB interconnection.

Highly anisotropic microwave plasma etching for high packing density silicon patterns

Anisotropic etching which can be performed effectively with a low-pressure and high-density plasma may sometimes produce nonuniform patterns. Such a phenomenon has been observed in Si trench etching and poly-Si etching. Although this phenomenon is thought to be based on the local electric field, the mechanism for its generation is not clear. The nonuniformity of the ion direction, which is a serious problem in the fabrication of higher-packing-density patterns of future ULSIs such as 256 M DRAMs is considered. Time-modulated (TM) etching based on a model featuring pattern-plasma interaction is also discussed. It was found that peripheral patterns are inclined by the local electric field generated by the secondary electron effect. Using TM etching with an alternately supplied bias, such nonuniformity was reduced, and quarter-micron-level anisotropic etching of dense Si patterns was achieved.<<ETX>>

19.1: Invited Paper: Driver IC Packaging Technologies Using Anisotropic Conductive Films in Flat Panel Display

Anisotropic conductive films (ACFs) are adhesive films with anisotropic conductivity induced by dispersing conducting particles such as metal coated plastic balls and metal particles into polymer matrices such as thermoplastics and thermosetting resins. ACFs have been widely used for driver IC packaging technologies in FPDs(Flat panel displays) such as LCDs(Liquid crystal displays) for last two decades. So far various packaging technologies such as TCP(Tape carrier package) on LCD panel or PWB(Printed wiring board), COF(Chip on flex) on LCD panel or PWB, and COG(Chip on Glass) using ACFs have been realized to meet the requirement of fine pitch capability and make the flat panel displays smaller, lighter and thinner. In this paper, the history of ACF and driver IC packaging are described. In addition, it is mentioned that how important driver IC packaging is in implementing the miniaturization, high resolution, low cost and high display quality. ACF material design for COF which is advantageous in fine pitch interconnection is described. It is indicated that low temperature curable ACF is very useful in improving productivity of LCD modules and reducing the thermal stress at the interface in large LCD modules. We also indicates that the warpage of LCD panel after COG interconnection induces the light linkage issue in LCD modules. Lowering bonding temperature of ACF is also very important in reducing the warpae issue and avoiding the light linkage issue when COG is applied for driver IC packaging in large LCD modules.

Nanofabrication with a novel EB system with a large and stable beam current

We describe nanofabrication using a novel electron beam (EB) system that has a large and stable beam current, combined with high resolution resists. This system has a low aberration objective lens and a Zr/O/W cathode that provides a probe current of 1.2 nA. By detecting Si-groove marks, the system achieves high overlay accuracy of within 10 nm (mean + 3σ) over large areas. We have realized resist nanofabrication down to 10 nm with small nano edge roughness. By introducing a hard mask consisting of a thin (25 nm) SiO 2 layer, we have also obtained a poly-Si gate structure of 30 nm on a thin (4 nm) gate oxide.