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Featured researches published by Yasuyuki Hoshi.


international symposium on power semiconductor devices and ic's | 1993

The IGBT with monolithic overvoltage protection circuit

Tomoyuki Yamazaki; Yasukazu Seki; Yasuyuki Hoshi; Naoki Kumagai

A novel IGBT (insulated-gate bipolar transistor) with a monolithic overvoltage protection circuit has been developed to obtain high resistance to overvoltage stress. This device is characterized by novel integration of an avalanche diode with an IGBT structure. The conventional IGBT process can be used to fabricate this device without any additional photomasks. Since it exhibits a large safe operating area, this device can be applied not only to a soft switching application like a voltage resonant circuit but also to a hard switching application like a snubberless inductive load circuit.<<ETX>>


international symposium on power semiconductor devices and ic s | 1998

New intelligent power multi-chips modules with junction temperature detecting function

Tamao Kajiwara; Atsushi Yamaguchi; Yasuyuki Hoshi; Kenya Sakurai

A new R-series IGBT-intelligent power module (IGBT-IPM) named the R-IPM has been developed. This R-IPM consists solely of silicon semiconductor chips, called IPMCMs (intelligent power multi-chip modules). The exclusive ICs used in the IPM provide over-temperature protection by directly detecting the junction temperature (T/sub j/) of an IGBT chip. This is a worldwide first. This paper describes the features of the R-IPM and the T/sub j/ detecting function technology.A new IGBT-IPM named R-IPM has been developed. This R-IPM consists of only silicon semiconductors chips, so called IPMCMs (intelligent power multi-chip modules). The exclusive monolithic IC used in the R-IPM provides over-temperature protection by directly detecting the junction temperature T/sub j/of the IGBT chips. This new T/sub j/ detection is the first of its kind. This paper describes the R-IPM and its T/sub j/ detecting technology.


international symposium on power semiconductor devices and ic's | 1995

Experimental demonstration of dual gate MOS thyristor

Noriyuki Iwamuro; Yasuyuki Hoshi; Tadayoshi Iwaana; Katsunori Ueno; Yasukazu Seki; Masahito Otsuki; Kenya Sakurai

A new device concept, called the dual gate MOS thyristor (DGMOS), is introduced for simultaneously obtaining the low on-state voltage drop of a thyristor together with the fast turn-off speed of an IGBT and the results of measurement performed on devices with 900 V forward blocking capability are reported for the first time. Its on-state voltage drop (Von) was 1.30V at a current of 12 A (71.4 A/cm/sup 2/) with a turnoff loss (Eoff) of 114 /spl mu/J. These values of Von, Eoff indicate a much superior trade-off characteristic when compared to the IGBT in the voltage resonant circuit. Furthermore, the ability to turn-off the DGMOS is found to be improved by a homogeneous current distribution at the turn-off stage via reducing a sheet resistance of the gate poly-crystalline silicon layer and increasing a transition time from the thyristor mode operation to the IGBT mode.


Materials Science Forum | 2012

High Performance SiC IEMOSFET/SBD Module

Shinsuke Harada; Yasuyuki Hoshi; Yuichi Harada; Takashi Tsuji; Akimasa Kinoshita; Mitsuo Okamoto; Youichi Makifuchi; Yasuyuki Kawada; Kouji Imamura; Masahide Gotoh; Takeshi Tawara; Shinichi Nakamata; Tetsuo Sakai; Fumikazu Imai; Naoyuki Ohse; Mina Ryo; Atsushi Tanaka; Kazuo Tezuka; Tatsurou Tsuyuki; Saburou Shimizu; Noriyuki Iwamuro; Yoshiyuki Sakai; Hiroshi Kimura; Kenji Fukuda; Hajime Okumura

SiC power module with low loss and high reliability was developed by utilizing IEMOSFET and SBD. The IEMOSFET is the SiC MOSFET with high channel mobility in which the channel region is the p-type carbon-face epitaxial layer with low acceptor concentration. Elemental technologies for the high channel mobility and the high reliability of the gate oxide have been developed to realize the excellent characteristics by the IEMOSFET. The SBD was designed so as to minimize the forward voltage drops and the reverse leakage current. For the fabrication of these SiC power devices, the mass production technology such as gate oxidation, ion implantation and following activation annealing have been also developed.


international symposium on power semiconductor devices and ic's | 1991

Switching loss analysis of shorted drain non punch-through and punch-through type IGBTs in voltage resonant circuit

Noriyuki Iwamuro; Yasuyuki Hoshi; Yasukazu Seki; Naoki Kumagai

The dissipated turn-off losses of shorted drain non-punch-through and punch-through type IGBTs (insulated-gate bipolar transistors) are investigated for voltage resonant circuit application. These characteristics are analyzed experimentally and calculated by using a two-dimensional device simulator. It is shown that the shorted drain structure is not effective for decreasing the dissipated loss, whereas the optimized punch-through type IGBT is suitable for this circuit application.<<ETX>>


international symposium on power semiconductor devices and ic s | 1996

2nd generation dual gate MOS thyristor

Noriyuki Iwamuro; Yuichi Harada; Tadayoshi Iwaana; Yasuyuki Hoshi; Yasukazu Seki

2nd generation dual gate MOS thyristor (2nd gen.-DGMOS) with 900 V blocking capability are presented to realize an extremely excellent trade-off characteristic between an on-state voltage drop and a turn-off loss with a high turn-off capability and to overcome the IGBTs characteristics for the first time. A superior on-state voltage drop (Von) of 1.29 V at 10 A(71.3 A/cm/sup 2/) with the turn-off loss (Eoff) of 101 /spl mu/J is successfully achieved. These values of Von, Eoff indicate the much superior trade-off characteristic to the IGBT. Furthermore, it should be noted that the 2nd gen.-DGMOS achieves better turn-off capability of approximately 500 A/cm/sup 2/ in a voltage resonant circuit, which is 3.0 times higher than that of the conventional DGMOS.


Japanese Journal of Applied Physics | 1991

Improvement of the Safe Operating Area for P-Channel Insulated-Gate Bipolar Transistors (IGBTs)

Katsunori Ueno; Yasuyuki Hoshi; Noriyuki Iwamuro; Naoki Kumagai; Osamu Hashimoto

A p-channel insulated-gate bipolar transistor (IGBT), which is supposed to be useful for many applications especially for inverters, is developed. The SOA (safe operating area) of p-channel IGBTs is narrower than that of n-channel IGBTs because of the positive-feedback mechanism between a high rate of the avalanche multiplication of electrons and a high current gain hfe of the wide-base npn transistor. The effect of the high resistivity of the p-base, which affects the avalanche breakdown, is examined by the numerical analysis and device fabrications. It is demonstrated that utilizing the high-resistivity (over 300 Ωcm) p-base is effective to suppress the electric field and improve the SOA without a substantial increase of the on-state voltage drop.


Archive | 2012

Silicon carbide vertical field effect transistor

Yuichi Harada; Shinsuke Harada; Yasuyuki Hoshi; Noriyuki Iwamuro


Archive | 2013

Vertical, high-voltage-resistant semiconductor device, and method for producing vertical, high-voltage-resistant semiconductor device

Noriyuki Iwamuro; 憲幸 岩室; Shinsuke Harada; 原田 信介; Yasuyuki Hoshi; 保幸 星; Yuichi Harada; 原田 祐一


Archive | 2016

DISPOSITIF À SEMI-CONDUCTEUR ET PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR

Yasuyuki Hoshi; 星 保幸; Yuichi Harada; 原田 祐一; Takashi Shiigi; 椎木 崇

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Yuichi Harada

National Institute of Advanced Industrial Science and Technology

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Shinsuke Harada

National Institute of Advanced Industrial Science and Technology

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Naoki Kumagai

National Institute of Advanced Industrial Science and Technology

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Mina Ryo

National Institute of Advanced Industrial Science and Technology

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Yoshiyuki Sakai

National Institute of Advanced Industrial Science and Technology

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