Yee Ja | Researchain

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Publication

Featured researches published by Yee Ja.

Archive | 2008

Methods and arrangements to model an asynchronous interface

Yee Ja; Bradley S. Nelson

Archive | 2006

Method for modeling metastability decay through latches in an integrated circuit model

Yee Ja; Bradley S. Nelson

Archive | 2005

System and method for accurately modeling an asynchronous interface using expanded logic elements

Bing-Lun Chu; Yee Ja; Bradley S. Nelson; Wolfgang Roesner

Archive | 2005

System and method for unfolding/replicating logic paths to facilitate propagation delay modeling

Yee Ja; Bradley S. Nelson

Archive | 2006

System and Method for Modeling Metastability Decay Through Latches in an Integrated Circuit Model

Yee Ja; Bradley S. Nelson

Archive | 2008

Modeling asynchronous behavior from primary inputs and latches

Zoltán Hidvégi; Yee Ja; Bradley S. Nelson

Archive | 2008

Method and System for Unfolding/Replicating Logic Paths to Facilitate Modeling of Metastable Value Propagation

Yee Ja; Bradley S. Nelson

Archive | 2008

Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic

Yee Ja; Bradley S. Nelson; Wolfgang Roesner

Archive | 2007

Accurately modeling an asynchronous interface using expanded logic elements

Bing-Lun Chu; Yee Ja; Bradley S. Nelson; Wolfgang Roesner

Archive | 2006

Method for asynchronous clock modeling in an integrated circuit simulation

Yee Ja; Bradley S. Nelson

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Collaboration

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Bradley S. Nelson

IBM

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Wolfgang Roesner

IBM

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Bing-Lun Chu

IBM

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Raymond W. M. Schuppe

IBM

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Zoltán Hidvégi

IBM

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