Yen-Ann Chen

Characteristics of MSM photodetectors with trench electrodes on p-type Si wafer

U-grooved metal-semiconductor-metal photodetectors (UMSM-PDs) having various trench depths of interdigitated electrodes and an intrinsic hydrogenated amorphous silicon (i-a-Si:H) to c-Si heterojunction have been fabricated successfully on a p-type [100] Si wafer. The U-grooved structures on c-Si were achieved with a simple orientation-dependent etching (ODE) process. Some important characteristics of the obtained UMSM-PDs are presented and discussed. An UMSM-PD with a 70 nm i-a-Si:H overlayer, 1.45 /spl mu/m-deep recessed electrodes, and 3 /spl mu/m finger width and spacing, had a full width at half maximum (FWHM) of 50.6 ps and a full-time of 132 ps for its temporal response under a bias of 15 V. The significant improvements of transient response for UMSM-PD, as compared to the conventional one, were attributed to the trench electrodes resulted in a stronger lateral electric field in the light absorption region of photodetector. At a bias of 20 V, this UMSM-PD had a responsivity of 0.25 A/W as measured with an 0.83-/spl mu/m incident semiconductor laser, a high photo/dark current ratio about 2000, and an internal quantum efficiency of 36%. This high photo/dark current ratio would be due to the additional i-a-Si:H overlayer on Si wafer. These mentioned performances were much better than those of the conventional Si-based planar MSM-PD.

Optoelectronic characteristics of a-SiC:H-based P-I-N thin-film light-emitting diodes with low-resistance and high-reflectance N/sup +/-a-SiCGe:H layer

The graded-gap a-SiC:H-based p-i-n thin-film light-emitting diodes (TFLEDs) with an additional low-resistance and high-reflectance n/sup +/-a-SiCGe:H layer were proposed and fabricated on indium-tin-oxide (ITO)-coated glass substrate in this paper. For a finished TFLED, a brightness of 720 cd/m/sup 2/ could be obtained at an injection current density of 600 mA/cm/sup 2/, and its EL (electroluminescence) threshold voltage was lowered to 8.6 V. In addition, the effects of reflectance and resistance of a-SiCGe:H film on the performance of TFLED were discussed. The optimum rapid thermal annealing (RTA) conditions for fabrication of TFLED after metallization were also studied and employed to improve the optoelectronic characteristics of TFLED.

Electrical and luminescent characteristics of a-SiC:H p-i-n thin-film LED'S with graded-gap junctions

a-SiC:H p-i-n thin-film LEDs (TFLEDs) containing a single graded-gap p-i-n junction (SG) or double graded-gap p-i-n and i-n junctions (DG) have been postulated and fabricated successfully on indium-tin-oxide (ITO)-coated glass substrates, with a plasma-enhanced chemical vapor deposition (PECVD) system. Some important characteristics and related physics of these two types of TFLEDs are presented and discussed. At an injection current density (J) of 600 mA/cm/sup 2/, the brightness (B) of the SG and DG TFLEDs obtained were 30 and 207 cd/m/sup 2/, respectively. This significant improvement of brightness, as compared to those of the previously reported TFLEDs with a highest brightness of 20 cd/m/sup 2/, could be ascribed to the reduced interface states with the graded-gap junctions, lower contact resistance between ITO and the p-layer due to plasma treatment of ITO prior to p-layer deposition, post metallization annealing of thermally evaporated Al on n-layer, and higher optical gaps (E/sub opt/s) of the doped layers employed. The slopes of the nearly linear B-J relationships show a diode factor very close to unity for the fabricated SG and DG TFLEDs. This implies that the electroluminescence (EL) mechanism of these TFLEDs might be a tail-to-tail-state recombination. In addition, the conduction currents of these TFLEDs are almost temperature dependent, and that of the DG TFLED might consist of an ohmic current and a space-charge-limited current (SCLC) within the lower and higher applied-bias regions, respectively.

Characteristics of Si-based MSM photodetectors with an amorphous-crystalline heterojunction

Abstract Various amorphous silicon alloy films (i.e. i-a-Si:H, i-a-Si 0.65 Ge 0.35 :H, and i-a-Si 0.56 C 0.44 :H) were deposited on crystalline silicon (c-Si) wafers to form amorphous-crystalline heterojunctions which could be used to enhance the performance of planar Si-based metal-semiconductor-metal photodetectors (MSM-PDs). The photocurrents (dark currents) of the fabricated devices were slightly (significantly) lower than that of the MSM-PD without amorphous layer, and the FWHM (full-width at half-maximum) of the temporal response for MSM-PD could be reduced by employing an amorphous film. Experimentally, at a bias voltage of 20 V and for a 830 nm incident semiconductor laser power of 10 μW, the Si-based MSM-PD with a 50 × 50 μ m 2 active area and an i-a-Si 0.65 Ge 0.35 :H overlayer had a responsivity of 0.35 A W −1 , a low dark current density of 0.4 pA μm −2 , a narrower FWHM of 53 ps, and a shorter transient tail of 399 ps for its temporal response. The spectral response of a Si-based MSM-PD with an additional amorphous overlayer had a peak around 700 nm, and covered the range 500–900 nm including 830 nm.

POROUS SILICON LIGHT-EMITTING DIODE WITH TUNABLE COLOR

Abstract We successfully combined porous silicon and amorphous silicon together to fabricate a light-emitting diode, whose emitting color was tunable with different applied voltage. When the applied voltage increased from 30 to 90 V, the emitting color of the device could change from red to blue.

Studies on reducing leakage current of large-area silicon microstrip sensors

8/spl times/4 cm/sup 2/ single-sided p/sup +/-i (or v)-n/sup +/ silicon microstrip sensors with coupling capacitors and polysilicon bias resistors were fabricated with the planar technology, and various techniques used to reduce the leakage currents of sensors and their results are presented. Different gettering processes have been employed to remove the impurities and defects from the sensor active regions, and the Electronic Research and Service Organization (ERSOs) Charge-Coupled Device (CCD) gettering technique, combined with backside polysilicon and oxide-nitride-oxide (ONO) deposition process, was found to be the most effective and suitable one. From the measurement results of the special p/sup +/-i (or v)-n/sup +/ junction test structures, it was found that the sensor leakage current mainly came from the side-wall leakage of its p/sup +/-strip. A modified LOCal Oxidation of Silicon (LOGOS) isolation process has been used to reduce this side-wall leakage. Also, the Sirtl-etch analysis of the sensor revealed that the side-wall leakage current has been caused by residual boron-implantation defects after annealing. These defects would concentrate along the edge of p/sup +/-strip and be enhanced to cause dislocations by the film-edge-induced stress effect. Several annealing techniques have also been studied to remove the boron-implantation damages. The fabricated prototype sensors have been tested in a beam at the CERN Super Proton Synchrotron area. The test results showed that the sensor concept under study is feasible.

Fabrication of double-metal AC-coupled silicon microstrip detectors

Abstract The 8 × 4 cm 2 single-sided double-metal p + -i-n + silicon microstrip detectors (SMDs) with coupling capacitors and polysilicon bias resistors were fabricated with the newly developed double-metal processing techniques with different inter-metal dielectrics. The results of using these processing techniques and some features of double-metal process are reported. The characteristics of polysilicon bias resistors obtained with BF 2 ion-implantations having various doses and their effects on the leakage currents of SMDs have also been studied.