Yi-Shao Lai

Optimization of Thermomechanical Reliability of Board-level Package-on-Package Stacking Assembly

In this paper, the Taguchi optimization method is applied to obtain the optimal and robust design towards enhancement of board-level thermomechanical reliability of a package-on-package stacking assembly under an accelerated thermal cycling test condition. An L18(2 1times37) orthogonal array is arranged for the optimization of eight selected control factors of the assembly, including thickness of dies, molding compounds, and substrates, sizes of package and molding compound, and solder joint standoffs. The importance of each of these control factors is compared and ranked

Investigations of Board-Level Drop Reliability of Wafer-Level Chip-Scale Packages

We present in this paper parametric studies of board-level reliability of wafer-level chip-scale packages subjected to a specific pulse-controlled drop test condition. Eighteen experiment cells, constructed by varying joint pitch, die thickness, and die size, are proposed and examined numerically. The transient analysis follows the support excitation scheme and incorporates an implicit time integration solver. Numerical results indicate that the drop reliability of the package enhances as the die thickness as well as the die size decreases. Moreover, the package with smaller solder joints and a smaller joint pitch suffers a greater drop reliability concern.

Optimal design in enhancing board-level thermomechanical and drop reliability of package-on-package stacking assembly

In this paper, the Taguchi optimization method is applied to obtain an optimal and robust design towards enhancement of board-level thermomechanical and drop reliability of a package-on-package stacking assembly under an accelerated thermal cycling test condition as well as a JEDEC drop test condition. An L18 (21 times 3 7) orthogonal array is arranged for the optimization of eight control factors for thermomechanical reliability while an L9 (34) orthogonal array of four control factors for drop reliability. Importance of each of these control factors is compared and ranked

High-power-used thermal gel degradation Evaluation on board-level HFCBGA subjected to reliability tests

HFCBGA is a thermally enhanced FCBGA with its heat spreader extending heat conduction area by connecting itself to the rear side of the silicon die. A thermal interface material plays an important role as a heat conduction path. The thermal performance should be checked not only at time zero, several types of reliability tests have to be examined to cover the field condition faced by end user. Temperature cycling test, highly-accelerated temperature and humidity stress test and multiple reflows are chosen for investigating thermal resistance of junction to case of a selected thermal gel.

Thermal Characteristics and Thermomechanical Reliability of Board-Level Stacked-Die Packages Subjected to Coupled Power and Thermal Cycling Test

The sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, is performed to investigate thermal characteristics along with fatigue reliability of a board-level stacked-die package under coupled power and thermal cycling test conditions. Different powering conditions and sequences are compared. From the numerical results, we note that under coupled power and thermal cycling tests, reliability performances of a board-level stacked-die package should be similar as long as the total power dissipation prescribed to the package is identical, regardless of how the power distributes among separate dies.

Parametric study on board-level electronic test device subjected to JEDEC vibration loads

We derive in this paper equations of motion of board-level IC packages subjected to swept sine vibration loads following the support excitation scheme. Harmonic analysis is performed based on the argument such that at each loading state over the swept sine process, hysteresis responses of solder joints following the isotropic hardening rule vanish fairly quickly so that plasticity is fully developed. Computed and measured acceleration response spectra of a board-level test vehicle are benchmarked. Stress-based failure indices as well as elastoplastic responses and strain rates of solder joints are examined for the test vehicle subjected to swept sine vibration tests of different acceleration levels with vibration frequencies up to 2 kHz.

Finite Element Analysis Procedure for Board-level Swept Sine Vibration Tests

We derive in this paper equations of motion of board-level electronic packages subjected to swept sine vibration loads following the support excitation scheme. Harmonic analysis is performed based on the argument such that at each loading state over the swept sine process, hysteresis responses of solder joints following the isotropic hardening rule vanish fairly quickly so that plasticity is fully developed. Computed and measured acceleration response spectra of a board-level test vehicle are benchmarked

Effect of surface roughness of silicon die and copper heat spreader on thermal performance of HFCBGA

From the available mass production devices of HFCBGAs, there can be a range of surface roughness with different surface finished of silicon dies and heat spreader. An aluminum filled gel is used to examine the surfaces clamping with both identical substrates at both sides whether compatible to the thermal conduction. Their thermal contact resistances are measured by laser flash technology and therefore modeling HFCBGAs with those measured roughnesses and resistances for characterizing thermal performances.

Coupled power and thermal cycling characteristics and reliability of stacked-die packages

We perform the sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, to examine thermal characteristics along with fatigue reliability of a board-level stacked-die package under coupled power and thermal cycling test conditions. Different powering conditions and sequences are compared. From the numerical results, we note that under coupled power and thermal cycling tests, reliability performances of a board-level stacked-die package should be similar as long as the total power dissipation prescribed to the package is identical, regardless of how the power distributes among separate dies.

A Numerical Study of Board-level Stacked-die Packages Under Coupled Power and Thermal Cycling Test Conditions

In this study, the sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, is performed to investigate thermal characteristics along with fatigue reliability of board-level stacked-die thin-profile fine-pitch ball grid array chip-scale packages under coupled power and thermal cycling test conditions. Effects of different power dissipation conditions are examined and compared