Yibin Bai

Teledyne Imaging Sensors: silicon CMOS imaging technologies for x-ray, UV, visible, and near infrared

Teledyne Imaging Sensors develops and produces high performance silicon-based CMOS image sensors, with associated electronics and packaging for astronomy and civil space. Teledynes silicon detector sensors use two technologies: monolithic CMOS, and silicon PIN hybrid CMOS. Teledynes monolithic CMOS sensors are large (up to 59 million pixels), low noise (2.8 e- readout noise demonstrated, 1-2 e- noise in development), low dark current (<10 pA/cm2 at 295K) and can provide in-pixel snapshot shuttering with >103 extinction and microsecond time resolution. The QE limitation of frontside-illuminated CMOS is being addressed with specialized microlenses and backside illumination. A monolithic CMOS imager is under development for laser guide star wavefront sensing. Teledynes hybrid silicon PIN CMOS sensors, called HyViSITM, provide high QE for the x-ray through near IR spectral range and large arrays (2K×2K, 4K×4K) are being produced with >99.9% operability. HyViSI dark current is 5-10 nA/cm2 (298K), and further reduction is expected from ongoing development. HyViSI presently achieves <10 e- readout noise, and new high speed HyViSI arrays being produced in 2008 should achieve <4 e- readout noise at 900 Hz frame rate. A Teledyne 640×480 pixel HyViSI array is operating in the Mars Reconnaissance Orbiter, a 1K×1K HyViSI array will be launched in 2008 in the Orbiting Carbon Observatory, and HyViSI arrays are under test at several astronomical observatories. The advantages of CMOS in comparison to CCD include programmable readout modes, faster readout, lower power, radiation hardness, and the ability to put specialized processing within each pixel. We present one example of in-pixel processing: event driven readout that is optimal for lightning detection and x-ray imaging.

Development of hybrid CMOS visible focal plane arrays at Rockwell

Silicon-based hybrid CMOS visible focal plane array (FPA) technology is emerging as a strong contender for scientific applications that require broad spectral response with low noise, highly integrated functionality and radiation hardness. CMOS-based FPAs offer many advantages in high speed, low-noise detection and signal processing. As a high performance alternative to advanced CCD imaging arrays, the hybrid design enables independent optimization of the silicon detector array and silicon readout electronics. Multiplexer commonality with the instruments IR channels is another attractive feature for integrators of sensor sites such as for hyperspectral spectrometers. In this paper, the technical merits of Rockwells CMOS-based hybrid visible FPAs are described including key detector performance aspects, interface electronics requirements, radiation hardness and concomitant implications for diverse imaging applications. At this time we have developed 640 X 480 and 1024 X 1024 hybrid imagers with approximately equals 100% optical fill factor, high broadband QE spanning ultraviolet (UV) through near infrared (NIR), wide dynamic range, and high pixel operability. Dark current of approximately equals 0.01e-/sec and read noise approximately equals 6e- have been measured on one prototype 1024 X 1024 FPA that uses Hawaii readout integrated circuit (ROIC). Initial radiation data indicate a total ionization dose (TID) tolerance greater than 35 Krad for our standard CMOS process.

Hybrid CMOS focal plane array with extended UV and NIR response for space applications

Silicon-based hybrid CMOS focal plane array technology offers many advantages needed for both ground-based and space imaging applications. These advantages include enhanced UV and NIR sensitivity, extensive on-chip readout capability, inherent radiation hardness, flexible imaging readout and the ability to provide extremely low noise at high video rates. For infrared imaging applications that involve UV-through visible channels, the readout electronics commonality facilitates a great simplification to system designs. In this paper, Rockwell Scientific CMOS-based hybrid silicon FPA technology and the recent progress are presented. The hybrid FPAs developed include 640x480, 1024x1024 and 2048x2048 formats with pixel sizes ranging from 27μm to 18μm square, featuring a high optical fill factor (~100%), broad-band response (200nm to 1000nm) with high quantum efficiency, and low read noise (<6e-) that approaches astronomy CCDs at 100KHz video rate and surpasses astronomy CCDs at 1MHz rate. Other performance parameters, such as spatial uniformity, dark current, pixel crosstalk/MTF and CMOS features are also discussed.

Large-area visible arrays: performance of hybrid and monolithic alternatives

CMOS-based imaging system-on-chip (i-SoC) technology is successfully producing large monolithic and hybrid FPAs that are superior in many respects to competing CCD-based imaging sensors. The hybrid approach produces visible 2048 by 2048 FPAs with <6 e- read noise and quantum efficiency above 80% from 400 nm to 920 nm; 4096 by 4096 mosaics are now being developed. The monolithic approach produces visible 12-bit imaging system-on-chips such as a 1936 by 1088 with higher quantum efficiency than mainstream CCDs, <25 e- read noise, <0.02% fixed pattern noise, automatic identification and replacement of defective pixels, black-level clamping, total power dissipation of only 180 mW, and various programmable features. Several successors having ≥12 Mpixels are in development. In both cases low-light-level performance is boosted by coupling the sensors to image intensifiers.

Hybrid CMOS x-ray detectors: the next generation for focused x-ray telescopes

In a joint program of Penn State University and Teledyne Imaging Sensors, hybrid CMOS sensors have been developed for use as X-ray detectors. This detector technology can provide major improvements in performance relative to CCDs, which are the current standard technology used in the focal planes of X-ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). Future X-ray telescope missions are all likely to have significantly increased collection area. If standard CCDs are used, the effects of saturation (pile-up) will have a major impact, while radiation damage will impact the quality and lifetime of the detectors. By reading out the hybrid CMOS detector in a pixel-by-pixel fashion at high speeds, with an energy resolution similar to CCDs, CMOS sensors could increase the range of pile-up free operation by several orders of magnitude. They are also several orders of magnitude more radiation hard than typical CCDs since they transfer charge through the thickness of the device, rather than across the length of its surface. Furthermore, hybrid CMOS detectors can be programmed to read out any variety of windowed regions, which leads to versatility and speed. All of this can be achieved, in principle, while maintaining the same quantum efficiencies achievable in CCDs. Results of this development effort and preliminary tests of fabricated detectors will be presented, along with potential applications for future missions such as EDGE and Constellation-X.

Hybrid image sensor with multiple on-chip frame storage for ultrahigh-speed imaging

A high-resolution hybrid visible imager, that is composed of a CMOS readout integrated circuit (ROIC) and a silicon photo-detector array, has been designed. The ROIC is fabricated with a standard 0.25 μm CMOS mixed-mode process with a back-illuminated silicon detector array that is produced at Rockwell Scientific Company (RSC) using RSCs HyViSITM process. The camera system is designed primarily to record images formed on a scintillator used in pulsed proton radiography experiments. In such experiments, the repetition rate of the proton beam can be as high as 2.8 MHz (358 ns). An imaging system with the desired 1440x1440 pixels resolution would result in an instantaneous readout rate in excess of 5.79 E12 samples/s. To address this issue we designed a pixel with three-frame in-pixel analog storage allowing for a deferred slower readout. The 26 μm pitch pixel imager is operated in a global shutter mode and features in-pixel correlated double sampling (CDS) for each of the three acquired frames. The CDS operation is necessary to overcome the kTC noise of the integrating node to achieve high dynamic range. A 65 fps continuous readout mode is also provided. The hybridized silicon array has close to 100% fill factor while anti-reflection (AR) coating maximizes its quantum efficiency at the scintillator emission wavelength (~415 nm). The ROIC is a 720x720, two-side buttable integrated circuit with on-chip 12-bit analog to digital converter (ADC) for digital readout. Timing and biasing are also generated on-chip, and special attention has been given to the power distribution of the pixel-array and snapshot signal buffers. This system-on-chip approach results in a compact and low power camera, an important feature to extend the number of imaged frames by synchronizing multiple cameras.

Visible and infrared detectors at Rockwell Science Center

Rockwell Space Center is developing low-noise visible and IR imaging sensors and systems for astronomy, high-end commercial, NASA, and advanced military applications. The first science grade 2048 by 2048 HAWAII-2 focal plane array (FPA) for astronomy was recently demonstrated for the SWIR waveband. Science-grade deliveries to the University of Hawaiis Institute for Astronomy, the European Southern Observatory and the Subaru Telescope, among others, will soon start. MWIR/visible 2048 by 2048 HAWAII-2 arrays are also being developed for the NGST program using our process for removing the CdZnTe substrate from the back-side illuminated HgCdTe FPAs to detect visible radiation in addition to IR. Previously, more than 25 science grade 2.5micrometers 1024 by 1024 HAWAII FPAs were delivered for use in many observatories; these typically exhibit < 0.1 e-/s dark current and < 10 e- read noise after correlated double sampling at temperatures above 60K. 1024 by 1024 FPAs development is also continuing; dark current < 1 e-/s has been measured at 140K for a NIR 1024 by 1024 HAWAII array. In a related effort, development of high frame rate, low noise FPAs has begun for wavefront sensing including adaptive optical systems for both visible and NIR/SWIR bands. Hybrid Visible Silicon Imager development is also continuing, expanding the success achieved with prior 640 by 480 FPAs. We are now demonstrating 1024 by 1024 arrays with 0.3-1.05 micrometers response. The silicon detectors in HyViSI FPAs are independently processed on silicon wafers and mated to the same multiplexers fabricated originally for interface to HgCdTe detectors. HyViSI FPA quantum efficiency is > 90 percent with near-100 percent fill factor, and the dark current is negligible with minimum cooling. Our near-term plan to develop 4096 by 4096 visible and IR FPAs will also be discussed.

Measurements of Si Hybrid CMOS X-Ray Detector Characteristics

The development of Hybrid CMOS Detectors (HCDs) for X-Ray telescope focal planes will place them in contention with CCDs on future satellite missions due to their faster frame rates, flexible readout scenarios, lower power consumption, and inherent radiation hardness. CCDs have been used with great success on the current generation of X-Ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). However their bucket-brigade readout architecture, which transfers charge across the chip with discrete component readout electronics, results in clockrate limited readout speeds that cause pileup (saturation) of bright sources and an inherent susceptibility to radiation induced displacement damage that limits mission lifetime. In contrast, HCDs read pixels with low power, on-chip multiplexer electronics in a random access fashion. Faster frame rates achieved with multi-output readout design will allow the next generations larger effective area telescopes to observe bright sources free of pileup. Radiation damaged lattice sites effect a single pixel instead of an entire row. Random access, multi-output readout will allow for novel readout modes such as simultaneous bright-source-fast/whole-chip-slow readout. In order for HCDs to be useful as X-Ray detectors, they must show noise and energy resolution performance similar to CCDs while retaining advantages inherent to HCDs. We will report on readnoise, conversion gain, and energy resolution measurements of an X-Ray enhanced Teledyne HAWAII-1RG (H1RG) HCD and describe techniques of H1RG data reduction.

4K×4K format 10μm pixel pitch H4RG-10 hybrid CMOS silicon visible focal plane array for space astronomy

Teledyne’s silicon hybrid CMOS focal plane array technology has matured into a viable, high performance and high- TRL alternative to scientific CCD sensors for space-based applications in the UV-visible-NIR wavelengths. This paper presents the latest results from Teledyne’s low noise silicon hybrid CMOS visible focal place array produced in 4K×4K format with 10 μm pixel pitch. The H4RG-10 readout circuit retains all of the CMOS functionality (windowing, guide mode, reference pixels) and heritage of its highly successful predecessor (H2RG) developed for JWST, with additional features for improved performance. Combined with a silicon PIN detector layer, this technology is termed HyViSI™ (Hybrid Visible Silicon Imager). H4RG-10 HyViSI™ arrays achieve high pixel interconnectivity (<99.99%), low readout noise (<10 e- rms single CDS), low dark current (<0.5 e-/pixel/s at 193K), high quantum efficiency (<90% broadband), and large dynamic range (<13 bits). Pixel crosstalk and interpixel capacitance (IPC) have been predicted using detailed models of the hybrid structure and these predictions have been confirmed by measurements with Fe-55 Xray events and the single pixel reset technique. For a 100-micron thick detector, IPC of less than 3% and total pixel crosstalk of less than 7% have been achieved for the HyViSI™ H4RG-10. The H4RG-10 array is mounted on a lightweight silicon carbide (SiC) package and has been qualified to Technology Readiness Level 6 (TRL-6). As part of space qualification, the HyViSI™ H4RG-10 array passed radiation testing for low earth orbit (LEO) environment.

Recent progress of hybrid CMOS visible focal plane array technology

Silicon-based hybrid CMOS visible focal plane array technology is emerging as a viable high performance alternative to scientific CCDs. The progress is attributed to the rapid advances in CMOS technology, mature precision flip-chip hybridization of large size and fine pixel arrays, and detector array performance improvements. Its technology readiness level (TRL) for space applications is being enhanced by relevant environmental tests and in-depth characterization of sensor performance. In this paper, we present recent results of Rockwell Scientifics hybrid CMOS silicon focal plane array technology, including large format arrays up to 2048x2048, broadband QE, sensor noise improvement, high radiation hardness, and the higher degree of system integration through on-chip ADCs and companion ASICs.