Yoshikazu Tezuka

Multicast routing algorithm for nodal load balancing

The authors propose two multicast routing algorithms which distribute copy operation of packets over all nodes along the multicast path: a link-added type algorithm and a loop-constructed type algorithm. Both algorithms, at first, derive an approximate solution for minimum cast path, and then improve the solution to prevent concentration of packet copy operation at one switching node at a little sacrifice of total cost along the path. Computer simulation results show that too much copy operation per node can be avoided by these algorithms. Compared to the minimum cost solution of the tree-shaped multicast path, the solution of the proposed algorithms makes the average distance connecting a source-destination pair longer, but the sacrifice of total cost is verb small. These algorithms can be applied not only to packet networks but also asynchronous transfer mode (ATM) networks.<<ETX>>

Connectionist model binarization

The application of a connectionist model to an image binarization method called connectionist model binarization (CMB) is discussed. CMB employs a multilayer network of a connectionist model whose input and output are a histogram and a desirable threshold for binarization, respectively. This network is trained with a back-propagation algorithm to output a threshold which gives a visually suitable binarised image against any histogram. The details of CMB are described, and its learning strategy and binarization performance are discussed.<<ETX>>

Delay performance of a continuous ARQ system with copy-transmissions

The characteristics of the transmission delay packets in continuous ARQ (automatic-repeat-request) system, a class of the go-back-N system, are considered. In this ARQ scheme the multiple copies of each packet stored in a buffer, instead of one packet itself, are transmitted to reduce the delay. The generating function of the delay and its average is derived. It is shown that the optimum copy-size minimizing the average delay is given not only by the propagation delay and the packet error rate but also by the traffic intensity.<<ETX>>

Peak rate regulation scheme for ATM networks and its performance

Using the rate control to restrict the peak cell rate of traffic is addressed. The asynchronous transfer mode (ATM) environment is considered as a discrete-time environment in which one slot is equal to one cell transmission time. A rate control that can restrict the number of cells during any fixed-length time interval in a discrete-time environment is studied. The scheme is realized by means of simple counter accumulation per slot, and it is easy to synchronize with slots. The simplicity of this scheme may make possible the flexible restriction of the peak cell rate according to network conditions. The scheme is analyzed, using matrix analytic techniques, in order to investigate the smoothing effect of bursty traffic and the queue length required to satisfy a certain quality of cell loss probability. Numerical results show the effect of restricting the peak cell rate of bursty traffic and the tradeoff between the smoothing effect and the required queue length.<<ETX>>

Traffic control scheme for interconnection of FDDI networks through ATM network

A traffic control scheme for FDDI (fiber distributed data interface) interconnection through an ATM (asynchronous transfer mode) network is presented. The scheme consists of two parts, a VP (virtual path) bandwidth allocation algorithm and a feedback type buffer protection flow control. Both use the acknowledge for the frame of FDDI as a control unit. Simulation results show that VP bandwidth allocated by the scheme increases according to arrival traffic when the destination FDDI has enough capacity and allocated bandwidth is not increased when its capacity is less than arrival traffic. Thus, the scheme has desirable VP bandwidth allocation characteristics. Simulation results also show that the scheme prevents cell loss at a destination gateway completely.<<ETX>>

A control-ahead ATM switch architecture and its performance

An asynchronous transfer mode (ATM) switch architecture that uses the broadcasting transmission medium for transmission of cells from input ports to output ports is introduced. Cell transmission and its control are separated completely, and cell transmission control, i.e. header operation, is executed before cell transmission (control ahead). With this operation, cell transmission and its control can be executed in a pipeline style, allowing high-speed cell exchange and making transmission control easier. One of the essential problems for ATM switches which use the broadcasting transmission medium is high-speed operation of the transmission medium. The switch fabric performance is analyzed according to its switching speed. Numerical results show that the ATM switch proposed shows good cell loss performance even when its switching speed is restricted, provided that switch utilization is below 1. Extensions to the switch that lead to robustness against bursty traffic are shown. >

CONNECTIONIST MODEL BINARIZATION

Image binarization is a task to convert gray-level images into bi-level ones. Its underlying notion can be simply thought of as threshold selection. However, the result of binarization will cause significant influence on the process of image recognition or understanding. In this paper we discuss a new binarization method, named CMB (connectionist model binarization), which uses the connectionist model. In the method a gray-level histogram is input to a multilayer network trained with the back-propagation algorithm to obtain a threshold which gives a visually suitable binarized image. From the experimental results, it was verified that CMB is an effective binarization method in comparison with other methods.

A high-speed packet switch architecture with a multichannel bandwidth allocation

A novel packet switch architecture is proposed based on a channel grouped virtual circuit (CG-VC) scheme for high-speed communication networks. The case is considered in which there are several parallel channels between two switching nodes. The CG-VC scheme allows a packet to select an available channel in such a way as to avoid congested channels using a simple, hardware-based, self-routing mechanism. As a result, the architecture provides efficient channel use and low switching delay. The performance of the proposed switch is evaluated by simulation. The results show the proposed switch significantly improves channel utilization and switching delay compared with conventional single-channel allocation transmission policies.<<ETX>>

Analysis of the Address Assignment Problem for Clustered Keys

The occurrence pattern of clusterings of keys is analyzed by use of the generating function. Probabilities of occurrences of several clustered patterns are given as the coefficients of generating functions. Moreover, the result when a key-to-address transformation of <italic>aK</italic> + <italic>b</italic>/mod <italic>c</italic> is performed on clustered keys is briefly discussed.

Model based system for analyzing document images

Document image analysis is the process of deriving logically structured representation of a document by analyzing the layout structure of its image. This paper proposes a knowledge based system for document image analysis which is applicable to various kinds of documents. The characteristics of the system are as follows: (1) The knowledge base called document model encodes only object-level knowledge hierarchically, declaratively and symbolically, aiming at high expressivity and maintainability of the knowledge description; (2) the document model is automatically constructed by referring samples of document images, and incrementally refined by feedback of error information of analysis.<<ETX>>