Yoshio Terasawa

High-speed low-loss p-n diode having a channel structure

A p-n diode having a channel structure (static shielding diode, SSD) is proposed to increase the reverse blocking voltage of a low-loss high-speed p-n diode. It is shown by numerical analysis and experiment that a low-loss, high-speed SSD with high blocking capability can be realized by surrounding the p-layer and a portion of the n-layer with a highly doped p+-layer. In this method, the blocking voltage can be increased by a factor of 2 to 3.5 without sacrificing the low forward voltage drop and fast reverse recovery. The SSD with a 0.81-V forward voltage drop at 80 A/cm2, a 180-V blocking voltage at 150°C, and a 87-ns reverse recovery time can be fabricated.

High power static induction thyristor

Two types of static induction thyristors have been developed. The forward blocking voltage and the maximum gate turn-off current of these devices are 800 V, 100 A and 2.5 kV, 500 A, respectively. It has been shown that these devices gave a high forward voltage blocking gain, high current gate turn-off capability, fast gate turn-off speed, high di/dt and dv/dt capabilities and high allowable operating temperature.

One-dimensional analysis of turnoff phenomena for a gate turnoff thyristor

Turnoff phenomena for a one-dimensional gate turnoff thyristor (GTO) are investigated using exact numerical solutions of a full set of semiconductor device equations. It is shown that the time responses of the hole and the electron densities around the center junction J2 are responsible for the dynamic behavior of the GTO. The storage time almost corresponds to the time period required for J2 to come out of saturation. The fall time is the period from the coming out of saturation of J2 to the point when the cathode emitter junction recovers. Time variations in the rates of replenishment and removal of holes in the p-base during the dynamic turnoff process are discussed, and an understanding of the switching mechanism, which is not obtainable in the generally used static transistor analogy, is obtained. Though a one-dimensional model is employed in this paper, it still provides a great deal of insight into the devices operation.

Numerical analysis of turn-off characteristics for a gate turn-off thyristor with a shorted anode emitter

Turn-off current waveform for a gate turn-off thyristor (GTO) with a shorted anode emitter has been calculated numerically by solving the semiconductor basic equations in an equivalent one-dimensional model device. This model is derived from the analysis of current and carrier distributions obtained by a two-dimensional calculation of the on-state of GTO. A calculated turn-off current waveform agrees well with the experimental waveform. The computational time of one case is about 2 min. It is shown that this one-dimensional analysis method is useful for the calculation of the turn-off time. Using this one-dimensional model during the turn-off process and the two-dimensional model in the on-state, the relation between turn-off time and the forward voltage drop can be obtained in relation to the shorted emitter structure. It is shown that the shorted emitter structure is useful to improve this tradeoff relation.

Observation of turn-on action in a gate-triggered thyristor using a new microwave technique

The turn-on action by the p-base and n-emitter gates in a thyristor was studied by a new microwave technique. The initial conducting area, the lateral distribution of gate current flowing through the junction, and the time variation of excess carrier density injected into the n-base by the gate current were determined by measuring the reflection of microwave energy, vertically incident upon a small area (0.2 × 0.2 mm2) of the n-emitter layer. The new microwave technique has proved to be useful in designing new gate structures and in studying the operation of new devices.

A 2.5-kV static induction thyristor having new gate and shorted p-emitter structures

An SI thyristor with new gate and shorted p-emitter structures (DTT-SI thyristor) is proposed to realize a high-voltage high current high-speed device having a low forward voltage drop. Investigations using fabricated 2.5-kV 100-A DTT-SI thyristors and numerical analyses show that the DTT-SI thyristor has a good trade-off between the forward voltage drop and switching characteristics when the channel width is 8-10 µm and the maximum impurity concentration is about 1 × 1017to 4 × 1017cm-3. The typical fabricated DTT-SI thyristor has a 2.5-kV forward blocking voltage with a 58-V reverse gate bias voltage, a 1.4-V forward voltage drop with a 100-A anode current, a 2- µs turn-on time, adi/dtcapability higher than 4000 A/µs, and can interrupt a 900-A anode current with a 3.5-µs turn-off time and a 5.6 gate turn-off gain on application of a 100-V reverse gate bias voltage.

One-dimensional analysis of reverse recovery and dv/dt triggering characteristics for a thyristor

Reverse recovery anddv/dttriggering characteristics of a thyristor are analyzed using a one-dimensional numerical model, which consists of the solutions of the full set of semiconductor device equations, including the effect of the shorted emitter. The calculated waveforms of the anode voltage and current are in good agreement with the experimental ones. The reverse recovery characteristic is discussed for the case of an inductive load, and the dependence of capacitive and resistive components of the space-charge region on residual carriers in the n base is discussed on the basis of carrier distributions. Also, the role of the shorted emitter ondv/dttriggering is investigated in connection with the rates of supply and removal of carriers in the p base. It is shown that the shorted emitter improvesdv/dtcapability by causing not only a reduction in the injection efficiency of the n emitter, but also rapid turn-off of the n-p-n transistor section of a thyristor.

One-dimensional analysis of dynamic behavior of a thyristor

The dynamic behavior of a thyristor is numerically analyzed by solving a one-dimensional Poissons equation and one-dimensional time-dependent continuity equations. The calculated results of the gate turn-on, dv/dt triggering and reverse recovery characteristics are compared with the experimental results. The advantage of this one-dimensional analysis method is that the dynamic characteristics of a thyristor with an arbitrary shorted emitter resistance and an arbitrary impurity profile can be analyzed.

Calculation of two-dimensional temperature rise distribution in a thyristor

When a square-wave current flows through a thyristor, time variations of two-dimensional temperature rise distribution in the thyristor are calculated using a finite-difference method and the on-region of the n-base layer, which was measured by a microwave technique. The calculated result approximately agrees with the temperature rise distribution measured using an infrared microscope. It is shown that the position where temperature rise is highest moves away from the initial turn-on area with time.

Numerical analysis of blocking characteristics for thyristors

Blocking characteristics of high power thyristors are calculated and analyzed by solving the full set of one-dimensional semiconductor device equations numerically. It is found that the hole injection efficiency is small and the current amplification is limited by the injection efficiency rather than by the transport factor, contrary to the conventional assumption for high power thyristors. The effective avalanche multiplication factor is larger than the multiplication factor Mpfor holes because of the contribution of the generated carriers in the depletion region, and the conventional assumption employing Mpfor the multiplication factor gives the value of the leakage current considerably smaller than the exact one. The increase in the leakage current with decreasing n-base width is caused by the increase in the injection efficiency.