Yoshitada Oshida

Chip leveling and focusing with laser interferometry

A new chip leveling and focusing method has been developed which uses interferometry with a laser beam which has S-polarization and a large incident angle to the exposure surface of an LSI wafer and thereby leveling and focusing accuracy is maintained regardless of the kinds of layers on the wafer. A pilot model of this type of detection method demonstrated a leveling and focusing accuracy of about and 1.

Focusing and leveling based on wafer surface profile detection with interferometry for optical lithography

A new concept of shot-by-shot leveling for high resolution stepper systems, profile-based- leveling, is presented. This detects the wafer surface profile using laser interferometry. From the detected profile, this system determines where on the LSI chip to focus, and controls the wafer stage for focusing and leveling. With an experimental setup, a profile detection repeatability of +/- 0.02 micrometers , a tilt measurement repeatability of +/- 0.24 (mu) rad and a tilt measurement linearity of +/- 1.4 (mu) rad were obtained.

New 5X i-Line Projection Aligner For VLSI Fabrication

A new i-line projection aligner, the LD-5010i, has been developed and has two primary features : good patterning ability and good overlay accuracy. In this paper, performance of the i-line projection system and the characteristic alignment method, called the two-wavelength detection, are described.

Multispot scanning exposure system for excimer laser stepper

A new type of spot scanning exposure system has been developed for an excimer laser stepper. To optimize exposure parameters, the authors developed a SIPSE (Simulator for Spot Scanning Exposure) and performed experiments with a He-Cd laser and a g-line lens. Applying the results, a prototype of an excimer laser exposure system was developed. A lens evaluation system has also been developed to adjust the lens elements in the projection lens. Using these systems, 0.35 micron line and space patterns were clearly resolved. SIPSE will be usable to optimize a phase-shifting exposure system with a potential for 0.25 micron patterns.

Shot leveling and focusing with interferometry for optical lithography of sub-half-micron LSI

This paper presents a shot-by-shot leveling applied to an i-line stepper system. This shot leveler utilizes laser interferometry with a laser beam that has S-polarization and a large incident angle to the exposure surface of the LSI wafer. Thereby leveling and focusing accuracy is preserved regardless of the wafer surface condition under the photoresist. This system acquires interference fringe data with charge-coupled device (CCD) line image detector, and extracts the fringe frequency and phase information with a fast-Fourier-transformation (FFT). These correspond to the tilt and height information of the photoresist surface. The performance was evaluated with 4M-DRAM process wafers. Tilt and height measurement linearity was proved to be ±2 µrad and ±0.3 µm respectively, and total leveling control accuracy was proved to be better than ±7 µrad.

Accuracy Improvement of Shot Leveling and Focusing with Interferometry for Optical Lithography

This paper describes a new algorithm of shot-by-shot leveling using laser interferometry for a high resolution stepper system (wave amplitude uniform method). This unifies the interference fringe and can improve the accuracy of the height and tilt detection deviation. The effect of the WAUM was verified by simulation. The maximum offset deviation for tilt and height was proved to be ±2.4 µ rad and ±0.03 µ m respectively. The performance was evaluated with an Al processed wafer and tilt offset deviation was proved to be ±6.4 µ rad.

Relative Alignment By Direct Wafer Detection Utilizing Rocking Illumination Of Ar Ion Laser

A new alignment system for micron and submicron lithography has been developed by Hitachi. Ar ion laser and charge coupled devices (CCD) are used in this system to detect the relative position of wafer and reticle. Each wafer mark on the scribe lines is directly detected through the reduction lens and kept in position till exposure is completed. Direct wafer detection has been realized by using a chrome surface on the reticle as a reflector for the detection optics arranged under the reticle. This construction permits TTL on axis alignment to be performed without movement of the detection optics and does not obstruct the exposure light. As Ar ion laser light can transmit through the multi-layer resist, the mark under the resist can be detected. Laser rocking illumination of the wafer mark and the storage type light detector (CCD) allow highly accurate detection of grainy wafers. By chromatic aberration of the reduction lens for Ar ion laser light, the image of the wafer mark is presented below the reticle after reflection. This phenomena has prevented the detection of the relative position between the wafer and reticle using single detection optics. However this problem has been eliminated by using a hyperbolic grating on reticle. The hyperbolic grating illuminated by the Ar ion laser beam projects a line shape image on the image plane of the wafer mark, and the position of the line represents the position of the reticle. The alignment system achieves overlay accuracy (3σ) of less than 0.2 μm for process wafers and stable offset (for five days) of less than 0.05 μm. The alignment time is about 0.3 seconds.