Young Geun Ha

Role of Gallium Doping in Dramatically Lowering Amorphous‐Oxide Processing Temperatures for Solution‐Derived Indium Zinc Oxide Thin‐Film Transistors

[*] Prof. T. J. Marks, Dr. A. Facchetti, Dr. S. Jeong, Y.-G. Ha Department of Chemistry and the Materials Research Center Northwestern University 2145 Sheridan Road, Evanston, IL 60208 (USA) E-mail: t-marks@northwestern.edu; a-facchetti@northwestern.edu Prof. J. Moon Department of Materials Science and Engineering Yonsei University 134 Shinchon-dong, Seodaemun-gu, Seoul 120-749 (Korea) [+] Present address: Korea Research Institute of Chemical Technology, 19 Sinseongno, Yuseong, Daejeon 305-600 (Korea)

Flexible low-voltage organic thin-film transistors enabled by low-temperature, ambient solution-processable inorganic/organic hybrid gate dielectrics

We report here on the design, synthesis, processing, and dielectric properties of novel cross-linked inorganic/organic hybrid blend (CHB) dielectric films which enable low-voltage organic thin-film transistor (OTFT) operation. CHB thin films (20-43 nm thick) are readily fabricated by spin-coating a zirconium chloride precursor plus an α,ω-disilylalkane cross-linker solution in ambient conditions, followed by curing at low temperatures (~150 °C). The very smooth CHB dielectrics exhibit excellent insulating properties (leakage current densities ~10(-7) A/cm(2)), tunable capacitance (95-365 nF/cm(2)), and high dielectric constants (5.0-10.2). OTFTs fabricated with pentacene as the organic semiconductor function well at low voltages (<-4.0 V). The morphologies and microstructures of representative semiconductor films grown on CHB dielectrics prepared with incrementally varied compositions and processing conditions are investigated and shown to correlate closely with the OTFT response.

Printable cross-linked polymer blend dielectrics. Design strategies, synthesis, microstructures, and electrical properties, with organic field-effect transistors as testbeds.

We report here the synthesis and dielectric properties of optimized, cross-linked polymer blend (CPB) dielectrics for application in organic field-effect transistors (OFETs). Novel silane cross-linking reagents enable the synthesis of CPB films having excellent quality and tunable thickness (from 10 to approximately 500 nm), fabricated both by spin-coating and gravure-printing. Silane reagents of the formula X 3Si-R-SiX 3 (R = -C 6H 12- and X = Cl, OAc, NMe 2, OMe, or R = -C 2H 4-O-C 2H 4- and X = OAc) exhibit tunable reactivity with hydroxyl-containing substrates. Dielectric films fabricated by blending X 3Si-R-SiX 3 with poly(4-vinyl)phenol (PVP) require very low-curing temperatures ( approximately 110 degrees C) and adhere tenaciously to a variety of FET gate contact materials such as n (+)-Si, ITO, and Al. The CPB dielectrics exhibit excellent insulating properties (leakage current densities of 10 (-7) approximately 10 (-8) A cm (-2) at 2.0 MV/cm) and tunable capacitance values (from 5 to approximately 350 nF cm (-2)). CPB film quality is correlated with the PVP-cross-linking reagent reactivity. OFETs are fabricated with both p- and n-type organic semiconductors using the CPB dielectrics function at low operating voltages. The morphology and microstructure of representative semiconductor films grown on the CPB dielectrics is also investigated and is correlated with OFET device performance.

Solution-deposited organic - Inorganic hybrid multilayer gate dielectrics. Design, synthesis, microstructures, and electrical properties with thin-film transistors

We report here on the rational synthesis, processing, and dielectric properties of novel layer-by-layer organic/inorganic hybrid multilayer dielectric films enabled by polarizable π-electron phosphonic acid building blocks and ultrathin ZrO(2) layers. These new zirconia-based self-assembled nanodielectric (Zr-SAND) films (5-12 nm thick) are readily fabricated via solution processes under ambient atmosphere. Attractive Zr-SAND properties include amenability to accurate control of film thickness, large-area uniformity, well-defined nanostructure, exceptionally large electrical capacitance (up to 750 nF/cm(2)), excellent insulating properties (leakage current densities as low as 10(-7) A/cm(2)), and excellent thermal stability. Thin-film transistors (TFTs) fabricated with pentacene and PDIF-CN(2) as representative organic semiconductors and zinc-tin-oxide (Zn-Sn-O) as a representative inorganic semiconductor function well at low voltages (<±4.0 V). Furthermore, the TFT performance parameters of representative organic semiconductors deposited on Zr-SAND films, functionalized on the surface with various alkylphosphonic acid self-assembled monolayers, are investigated and shown to correlate closely with the alkylphosphonic acid chain dimensions.

High-Performance Single-Crystalline Arsenic-Doped Indium Oxide Nanowires for Transparent Thin-Film Transistors and Active Matrix Organic Light-Emitting Diode Displays

We report high-performance arsenic (As)-doped indium oxide (In(2)O(3)) nanowires for transparent electronics, including their implementation in transparent thin-film transistors (TTFTs) and transparent active-matrix organic light-emitting diode (AMOLED) displays. The As-doped In(2)O(3) nanowires were synthesized using a laser ablation process and then fabricated into TTFTs with indium-tin oxide (ITO) as the source, drain, and gate electrodes. The nanowire TTFTs on glass substrates exhibit very high device mobilities (approximately 1490 cm(2) V(-1) s(-1)), current on/off ratios (5.7 x 10(6)), steep subthreshold slopes (88 mV/dec), and a saturation current of 60 microA for a single nanowire. By using a self-assembled nanodielectric (SAND) as the gate dielectric, the device mobilities and saturation current can be further improved up to 2560 cm(2) V(-1) s(-1) and 160 microA, respectively. All devices exhibit good optical transparency (approximately 81% on average) in the visible spectral range. In addition, the nanowire TTFTs were utilized to control green OLEDs with varied intensities. Furthermore, a fully integrated seven-segment AMOLED display was fabricated with a good transparency of 40% and with each pixel controlled by two nanowire transistors. This work demonstrates that the performance enhancement possible by combining nanowire doping and self-assembled nanodielectrics enables silicon-free electronic circuitry for low power consumption, optically transparent, high-frequency devices assembled near room temperature.

Hybrid gate dielectric materials for unconventional electronic circuitry

Recent advances in semiconductor performance made possible by organic π-electron molecules, carbon-based nanomaterials, and metal oxides have been a central scientific and technological research focus over the past decade in the quest for flexible and transparent electronic products. However, advances in semiconductor materials require corresponding advances in compatible gate dielectric materials, which must exhibit excellent electrical properties such as large capacitance, high breakdown strength, low leakage current density, and mechanical flexibility on arbitrary substrates. Historically, conventional silicon dioxide (SiO2) has dominated electronics as the preferred gate dielectric material in complementary metal oxide semiconductor (CMOS) integrated transistor circuitry. However, it does not satisfy many of the performance requirements for the aforementioned semiconductors due to its relatively low dielectric constant and intransigent processability. High-k inorganics such as hafnium dioxide (HfO2) or zirconium dioxide (ZrO2) offer some increases in performance, but scientists have great difficulty depositing these materials as smooth films at temperatures compatible with flexible plastic substrates. While various organic polymers are accessible via chemical synthesis and readily form films from solution, they typically exhibit low capacitances, and the corresponding transistors operate at unacceptably high voltages. More recently, researchers have combined the favorable properties of high-k metal oxides and π-electron organics to form processable, structurally well-defined, and robust self-assembled multilayer nanodielectrics, which enable high-performance transistors with a wide variety of unconventional semiconductors. In this Account, we review recent advances in organic-inorganic hybrid gate dielectrics, fabricated by multilayer self-assembly, and their remarkable synergy with unconventional semiconductors. We first discuss the principals and functional importance of gate dielectric materials in thin-film transistor (TFT) operation. Next, we describe the design, fabrication, properties, and applications of solution-deposited multilayer organic-inorganic hybrid gate dielectrics, using self-assembly techniques, which provide bonding between the organic and inorganic layers. Finally, we discuss approaches for preparing analogous hybrid multilayers by vapor-phase growth and discuss the properties of these materials.

Low-Temperature Solution-Processed Amorphous Indium Tin Oxide Field-Effect Transistors

Amorphous indium tin oxide (ITO)-based thin-film transistors (TFTs) were fabricated on various dielectrics [SiO(2) and self-assembled nanodielectrics (SANDs)] by spin-coating an ITO film precursor solution consisting of InCl(3) and SnCl(4) as the sources of In(3+) and Sn(4+), respectively, methoxyethanol (solvent), and ethanolamine (base). These films can be annealed at temperatures T(a) < or = 250 degrees C and afford devices with excellent electrical characteristics. The optimized [In(3+)]/[In(3+) + Sn(4+)] molar ratio (0.7) and annealing temperature (T(a) = 250 degrees C) afford TFTs exhibiting electron mobilities of approximately 2 and approximately 10-20 cm(2) V(-1) s(-1) with SiO(2) and SAND, respectively, as the gate dielectric. Remarkably, ITO TFTs processed at 220 degrees C still exhibit electron mobilities of >0.2 cm(2) V(-1) s(-1), which is encouraging for processing on plastic substrates.

Interface studies of ZnO nanowire transistors using low-frequency noise and temperature-dependent I-V measurements

Single ZnO nanowire (NW) transistors fabricated with self-assembled nanodielectric (SAND) and SiO2 gate insulators were characterized by low-frequency noise and variable temperature current-voltage (I-V) measurements. According to the gate dependence of the noise amplitude, the extracted Hooge’s constants (αH) are ∼3.3×10−2 for SAND-based devices and ∼3.5×10−1 for SiO2-based devices. Temperature-dependent I-V studies show that the hysteresis of the transfer curves and the threshold voltage shifts of SAND-based devices are significantly smaller than those of SiO2-based devices. These results demonstrate the improved SAND/ZnO NW interface quality (lower interface-trap states and defects) in comparison to those fabricated with SiO2.

1∕f noise of SnO2 nanowire transistors

The low frequency (1∕f) noise in single SnO2 nanowire transistors was investigated to access semiconductor-dielectric interface quality. The amplitude of the current noise spectrum (SI) is found to be proportional to Id2 in the transistor operating regime. The extracted Hooge’s constants (αH) are 4.5×10−2 at Vds=0.1V and 5.1×10−2 at Vds=1V, which are in general agreement with our prior studies of nanowire/nanotube transistors characterized in ambient conditions. Furthermore, the effects of interface states and contacts on the noise are also discussed.

High performance In2O3 nanowire transistors using organic gate nanodielectrics

In this study, we report high performance nanowire transistors using individual in 203 nanowires as channels, a multilayer self-assembled organic nano-dielectric (SAND) as the gate insulator (thickness -15 nm, capacitance -180 nF/cm2, and leakage current density ~1x10-6 A/cm2 up to 2 V). The NWTs use an individually addressable indium zinc oxide (IZO) bottom-gate and Al source/drain electrodes.