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Dive into the research topics where Yuan Guo-shun is active.

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Featured researches published by Yuan Guo-shun.


Journal of Semiconductors | 2009

A dual-mode complex filter for GNSS receivers with frequency tuning

Gan Yebing; Ma Chengyan; Yuan Guo-shun

A fifth/seventh order dual-mode OTA-C complex filter for global navigation satellite system receivers is implemented in a 0.18 μm CMOS process. This filter can be configured as the narrow mode of a 4.4 MHz bandwidth center at 4.1 MHz or the wide mode of a 22 MHz bandwidth center at 15.42 MHz. A fully differential OTA with source degeneration is used to provide sufficient linearity. Furthermore, a ring CCO based frequency tuning scheme is proposed to reduce frequency variation. The measured results show that in narrow-band mode the image rejection ratio (IMRR) is 35 dB, the filter dissipates 0.8 mA from the 1.8 V power supply, and the out-of-band rejection is 50 dB at 6 MHz offset. In wide-band mode, IMRR is 28 dB and the filter dissipates 3.2 mA. The frequency tuning error is less than ±2%.


Journal of Semiconductors | 2009

Low voltage bandgap reference with closed loop curvature compensation

Fan Tao; Du Bo; Zhang Zheng; Yuan Guo-shun

A new low-voltage CMOS bandgap reference (BGR) that achieves high temperature stability is proposed. It feeds back the output voltage to the curvature compensation circuit that constitutes a closed loop circuit to cancel the logarithmic term of voltage VBE. Meanwhile a low voltage amplifier with the 0.5 μm low threshold technology is designed for the BGR. A high temperature stability BGR circuit is fabricated in the CSMC 0.5 μm CMOS technology. The measured result shows that the BGR can operate down to 1 V, while the temperature coefficient and line regulation are only 9 ppm/°C and 1.2 mV/V, respectively.


asia and south pacific design automation conference | 2005

A novel differential VCO circuit design for USB Hub

Gong Qian; Yuan Guo-shun

The paper describes a novel differential voltage controlled oscillator circuit, which is used in the phase locked loop of a USB hub chip. The output clock signals can be altered from 36MHz to 96MHz by changing the value of control signals. The voltage controlled oscillator architecture, module circuits of voltage controlled oscillator design, simulation results, and chip layout are included. Experimental results using CSMC 0.6/spl mu/m process technology show that the anticipatory performance can be obtained and the voltage controlled oscillator circuit consumes only 0.9 mW from a 5V power supply.


Microelectronics & Computer | 2009

A LCD Driver Circuit with Key Input Function Design

Yuan Guo-shun


Microelectronics | 2013

Design and Implementation of a High Speed FIR Filter Based on FPGA

Yuan Guo-shun


Microelectronics & Computer | 2010

Image Rejection for GPS Receiver

Yuan Guo-shun


Microcomputer Information | 2010

Design and selection of LPF in AFGs

Yuan Guo-shun


Microcomputer Information | 2010

A New kind of current steering charge pump

Yuan Guo-shun


Microcomputer Information | 2010

A new scheme of SEE tolerant 32-bit MCU design

Yuan Guo-shun


Weidianzixue | 2009

1つの低/複数のデュアルモードフィルタの設計【JST・京大機械翻訳】

Gan Yebing; Pan Wenguang; Ma Chengyan; Yuan Guo-shun

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Du Bo

Chinese Academy of Sciences

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Fan Tao

Chinese Academy of Sciences

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Gan Yebing

Chinese Academy of Sciences

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Ma Chengyan

Chinese Academy of Sciences

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Gong Qian

Chinese Academy of Sciences

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Pan Wenguang

Chinese Academy of Sciences

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Zhang Zheng

Chinese Academy of Sciences

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